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Technical Committee on Dependable Computing (DC)
Chair: Satoshi Fukumoto (Tokyo Metropolitan Univ.) Vice Chair: Hiroshi Takahashi (Ehime Univ.)
Secretary: Masayuki Arai (Nihon Univ.), Kazuteru Namba (Chiba Univ.)

DATE:
Wed, Feb 26, 2020 10:00 - 17:00

PLACE:


TOPICS:


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Wed, Feb 26 AM (10:00 - 11:35)
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(1) 10:00 - 10:25
On Machine Learning Based Accuracy Improvement for A Digital Temperature and Voltage Sensor
Masayuki Gondo, Yousuke Miyake, Seiji Kajihara (Kyutech)

(2) 10:25 - 10:50
Defective Chip Prediction Modeling Using Convolutional Neural Networks
Ryunosuke Oka, Satoshi Ohtake (Oita Univ.), Kouichi Kumaki (Renesas)

(3) 10:50 - 11:15
A study on temperature dependence on discrimination of resistive opens using machine learning-based anomaly detection
Ryotaroh Nakanishi, Hiroyuki Yotsuyanagi, Masaki Hashizume (Tokushima Univ.), Yoshinobu Higami, Hiroshi Takahashi (Ehime Univ.)

----- Break ( 20 min. ) -----

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Wed, Feb 26 PM (11:35 - 14:10)
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(4) 11:35 - 12:00
Method for Inserting Fault-Detection-Strengthened Test Point under Multi-cycle Testing
Tomoki Aono, Norihiro Nakaoka, Shyu Saikou, Wang Senling, Higami Yoshinobu, Hiroshi Takahashi (Ehime Univ.), Hiroyuki Iwata, Youichi Maeda, Jun Matsushima (Renesas)

(5) 12:00 - 12:25
A controller augmentation method to reduce the number of untestable faults for multiplexers with n-inputs
Yuki Takeuchi, Toshinori Hosokawa, Hiroshi Yamazaki (Nihon Univ.), Masayoshi Yoshimura (Kyoto Sangyo Univ.)

(6) 12:25 - 12:50
Glitch PUF utilizing Unrolled Architecture and its Evaluation
Yusuke Nozaki, Masaya Yoshikawa (Meijo Univ.)

----- Break ( 80 min. ) -----

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Wed, Feb 26 PM (14:10 - 15:45)
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(7) 14:10 - 14:35
A Don’t Care Identification-Filling Co-Optimization Method for Low Power Testing Using Partial Max-SAT
Kenichiro Misawa, Toshinori Hosokawa, Hiroshi Yamazaki (Nihon Univ), Masayoshi Yoshimura (Kyouto Sangyo Univ), Masayuki Arai (Nihon Univ)

(8) 14:35 - 15:00
Power Analysis for Logic Area of LSI Including Memory Area
Yuya Kodama, Kohei Miyase, Daiki Takafuji, Xiaoqing Wen, Seiji Kajihara (Kyutech)

(9) 15:00 - 15:25
Improving Controllability of Signal Transitions in the High Switching Area of LSI
Jie Shi, Kohei Miyase, Xiaoqing Wen, Seiji Kajihara (Kyutech)

----- Break ( 20 min. ) -----

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Wed, Feb 26 PM 三宅 庸資(九工大) (15:45 - 17:00)
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(10) 15:45 - 16:10
Frequency Variation of Ring Oscillators During Long-Time Operation on FPGA
Shingo Tsutsumi, Yukiya Miura (Tokyo Metropolitan Univ.)

(11) 16:10 - 16:35
Accurate Recycled FPGA Detection Based on Exhaustive Path Analysis
Michihiro Shintani, Foisal Ahmed, Michiko Inoue (NAIST)

(12) 16:35 - 17:00
Soft Error Tolerance of Power-Supply-Noise Hardened Latches
Yuya Kinoshita, Yukiya Miura (Tokyo Metropolitan Univ.)

# Information for speakers
General Talk will have 20 minutes for presentation and 5 minutes for discussion.


=== Technical Committee on Dependable Computing (DC) ===
# FUTURE SCHEDULE:

Thu, Feb 27, 2020 - Fri, Feb 28, 2020: Yoron-cho Chuou-Kouminkan [Mon, Jan 6], Topics: ETNET 2020
Mon, May 11, 2020 - Tue, May 12, 2020: Institute of Industrial Science, University of Tokyo , Topics: LSI and System Workshop 2020

# SECRETARY:
Masayuki Arai (College of Industrial Technology, Nihon Univ.)
E-mail: arai.masayuki@nihon-u.ac.jp


Last modified: 2019-12-27 14:29:00


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