IEICE Technical Committee Submission System
Advance Program
Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top  Go Back   Prev CPSY Conf / Next CPSY Conf [HTML] / [HTML(simple)] / [TEXT]  [Japanese] / [English] 


Technical Committee on Computer Systems (CPSY) [schedule] [select]
Chair Yasuhiko Nakashima (NAIST)
Vice Chair Koji Nakano (Hiroshima Univ.), Hidetsugu Irie (Univ. of Tokyo)
Secretary Takashi Miyoshi (Fujitsu Labs.), Michihiro Koibuchi (NII)
Assistant Shinya Takameda (NAIST), Takeshi Ohkawa (Utsunomiya Univ.)

Technical Committee on Dependable Computing (DC) [schedule] [select]
Chair Nobuyasu Kanekawa (Hitachi)
Vice Chair Michiko Inoue (NAIST)
Secretary Koji Iwata (RTRI), Masayoshi Yoshimura (Kyoto Sangyo Univ.)

Conference Date Tue, Aug 4, 2015 09:30 - 20:40
Wed, Aug 5, 2015 09:00 - 19:00
Thu, Aug 6, 2015 09:00 - 20:40
Topics Parallel, Distributed and Cooperative Processing 
Conference Place Beppu B-Con Plaza 
Transportation Guide http://www.b-conplaza.jp/english/
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)

Tue, Aug 4 AM 
09:30 - 10:30
(1)
CPSY
09:30-10:00 The Network-on-Chip Optimization By Using Of Genetic Algorithm CPSY2015-16 Daichi Murakami, Kei Hiraki (UTokyo)
(2)
CPSY
10:00-10:30 Design Space Exploration of Computational Photography Accelerator CPSY2015-17 Yuttakon Yuttakonkit, Tran Thi Hong, Shinya Takamaeda, Yasuhiko Nakashima (NAIST)
  10:30-10:45 Break ( 15 min. )
Tue, Aug 4 AM 
10:45 - 12:15
(3) 10:45-11:15 [ARC] TBA
(4) 11:15-11:45 [ARC] TBA
(5) 11:45-12:15 [ARC] TBA
Tue, Aug 4 PM 
13:30 - 15:00
(6)
CPSY
13:30-14:00 Implementation and Evaluation of Near Memory Processing Architecture on FPGA CPSY2015-18 Tadahiro Edamoto, Thi Hong Tran, Shinya Takamaeda, Yasuhiko Nakashima (NAIST)
(7)
CPSY
14:00-14:30 Evaluation of ARM-EMAX tightly coupled accelerator on Zynq CPSY2015-19 Shohei Takeuchi, Thi Hong Tran, Shinya Takamaeda, Yasuhiko Nakashima (NAIST)
(8)
CPSY
14:30-15:00 A Feasibility Study on Implementing Micro-ITRON Task Scheduler by Wired-logic CPSY2015-20 Kouichi Araki (Godai Kaihatsu), Tomoaki Ukezono (Fukuoka Univ.)
  15:00-15:15 Break ( 15 min. )
Tue, Aug 4 PM 
15:15 - 16:45
(9) 15:15-15:45 [ARC] TBA
(10)
CPSY
15:45-16:15 Random memory network design for Hybrid Memory Cubes CPSY2015-21 Daichi Fujiki, Hiroki Matsutani (Keio Univ.), Michihiro Koibuchi (NII), Hideharu Amano (Keio Univ.)
(11) 16:15-16:45 [ARC] TBA
  16:45-17:00 Break ( 15 min. )
Tue, Aug 4 PM 
17:00 - 20:40
(12)
CPSY
17:00-17:30 Multiple-length multiplication for the GPU CPSY2015-22 Takumi Honda, Yasuaki Ito, Koji Nakano (Hiroshima Univ.)
(13)
CPSY
17:30-18:00 An Effective Scheduling of Data Transfer for GPU Applications CPSY2015-23 Kazuma Ono, Ryo Takeshima, Tomoaki Tsumura (Nagoya Inst. of Tech.)
(14)
CPSY
18:00-18:30 A Parallel Algorithm for LZW decompression, with GPU implementation CPSY2015-24 Shunji Funasaka, Yasuaki Ito, Koji Nakano (Hiroshima Univ.)
(15)
CPSY
18:30-19:00 Acceleration of Large-scale Interconnection Network Simulator by Using GPU CPSY2015-25 Yuki Suzuki, Takashi Yokota, Kanemitsu Ootsu, Takeshi Ohkawa (Utsunomiya Univ.)
  19:00-19:10 Break ( 10 min. )
  - BoF (19:10-20:40)
Wed, Aug 5 AM 
09:00 - 10:30
(16) 09:00-09:30 [ARC] TBA
(17) 09:30-10:00 [ARC] TBA
(18) 10:00-10:30 [ARC] TBA
  10:30-10:45 Break ( 15 min. )
Wed, Aug 5 AM 
10:45 - 12:15
(19) 10:45-11:15 Testbeds of a Highly Reliable Method for CANs in High Electromagnetic Environments CPSY2015-26 DC2015-22 Muneyuki Nakamura, Mamoru Ohara (Tokyo Metropolitan Univ.), Masayuki Arai (Nihon Univ.), Aromhack Saysanasongkham, Kazuya Sakai, Satoshi Fukumoto (Tokyo Metropolitan Univ.)
(20) 11:15-11:45 Fast single stream secure transport using AES-CTR mode CPSY2015-27 DC2015-23 Takeshi Fukunaga, Kei Hiraki (UTokyo)
(21) 11:45-12:15 Topology Alterable NoC with fault tolerance CPSY2015-28 DC2015-24 Seiichi Tade (Keio Univ.), Michihiro Koibuchi (NII), Hiroki Matsutani, Hideharu Amano (Keio Univ.)
Wed, Aug 5 PM 
14:00 - 15:00
(22) 14:00-14:30 [ARC] The All-In-One Package for Massively Multicore, Heterogeneous Jobs with Hotspots, and Data Streaming
Zhanikeev Marat
(23)
CPSY
14:30-15:00 Efficient Thread Control Method for Parallel Loop Processing by Dynamic Binary Translation CPSY2015-29 Hiroyuki Obuchi, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota (Utsunomiya Univ.)
  15:00-15:15 Break ( 15 min. )
Wed, Aug 5 PM 
15:15 - 16:45
(24)
CPSY
15:15-15:45 On-The-Fly Automated Storage Tiering with Proactive and Observational Migration CPSY2015-30 Kazuichi Oe (FUJITSU LABO.), Takeshi Nanri, Koji Okamura (Kyushu Univ.)
(25)
CPSY
15:45-16:15 Distributed Key Value Store for Resource Disaggregated Architecture CPSY2015-31 Masaki Kan, Jun Suzuki, Yuki Hayashi, Takashi Yoshikawa, Shinya Miyakawa (NEC Corp.)
(26)
CPSY
16:15-16:45 Fragmentation-aware Write Optimization for Flash SSDs CPSY2015-32 Shugo Ogawa, Takuya Araki (NEC)
  16:45-17:00 Break ( 15 min. )
Wed, Aug 5 PM 
17:00 - 19:00
(27)
CPSY
17:00-17:30 An Implementation of the Master-Worker based Parameter Server and its Application to BESOM CPSY2015-33 Meigi Rei (U of Tsukuba), Yusuke Tanimura, Yuuji Ichisugi, Hidemoto Nakada (AIST)
(28)
CPSY
17:30-18:00 A Cache Hierarchy in Kernel and NIC for NOSQL Acceleration CPSY2015-34 Yuta Tokusashi, Hiroki Matsutani (Keio Univ.)
(29)
CPSY
18:00-18:30 Data Management Method for Data Processing Middleware Using GPUs CPSY2015-35 Jun Suzuki (NEC/The University of Tokyo), Masaki Kan, Yuki Hayashi, Shinya Miyakawa (NEC), Masaru Kitsuregawa (The University of Tokyo)
  - 18:30-18:40 Award celemony
  18:40-19:00 Break ( 20 min. )
  - Banquet (19:00-)
Thu, Aug 6 AM 
09:00 - 10:30
(30)
CPSY
09:00-09:30 A Study for Data Deduplication using Block I/O Traces in Virtual Desktops CPSY2015-36 Tatsuo Kumano, Masahisa Tamura, Ken Iizawa, Toshihiro Ozawa (FLL)
(31) 09:30-10:00 [ARC] TBA
(32) 10:00-10:30 [ARC] TBA
  10:30-10:45 Break ( 15 min. )
Thu, Aug 6 AM 
10:45 - 11:45
(33)
CPSY
10:45-11:15 An Improved Algorithm for Random Topology Generation CPSY2015-37 Daisuke Takafuji, Satoshi Fujita, Koji Nakano (Hiroshima Univ.), Ikki Fujiwara, Michihiro Koibuchi (NII)
(34)
CPSY
11:15-11:45 Let's Solve the Order/Degree Problem to Make the Lowest-latency Interconnections CPSY2015-38 Ikki Fujiwara (NII), Satoshi Fujita, Koji Nakano (Hiroshima Univ.), Takeru Inoue (NTT), Michihiro Koibuchi (NII)
Thu, Aug 6 PM 
13:30 - 15:00
(35)
CPSY
13:30-14:00 Parallelization of Approximate String Matching Based on Computation of Prefix Sums CPSY2015-39 Yasuaki Mitani, Fumihiko Ino, Kenichi Hagihara (Osaka Univ.)
(36)
CPSY
14:00-14:30 A Study of Design Method on HW/SW Cooperative Image Processing System
-- A Case on an Acceleration of Stabilization Processing of Navigational Images --
CPSY2015-40
Takeshi Ohkawa (Utsunomiya Univ.), Yohei Matsumoto (Tokyo Marine Univ.), Manabu Inagawa (IDi), Kanemitsu Ootsu, Takashi Yokota (Utsunomiya Univ.)
(37)
CPSY
14:30-15:00 Performance tuning methods for out-of-core stencil computations with flash SSDs CPSY2015-41 Hiroko Midorikawa, Hideyuki Tan (Seikei Univ.)
  15:00-15:15 Break ( 15 min. )
Thu, Aug 6 PM 
15:15 - 16:45
(38) 15:15-15:45 [ARC] TBA
(39) 15:45-16:15 [ARC] TBA
(40) 16:15-16:45 [ARC] TBA
  16:45-17:00 Break ( 15 min. )
Thu, Aug 6 PM 
17:00 - 20:40
(41)
CPSY
17:00-17:30 A Nonparametric Online Outlier Detector for FPGA NICs CPSY2015-42 Ami Hayashi, Yuta Tokusashi (Keio Univ.), Hiroki Matsutani (Keio Univ./JST/NII)
(42)
CPSY
17:30-18:00 A Layout Method of High-Radix Topology onto 3D Stacking Chips CPSY2015-43 Hiroshi Nakahara, Ryota Yasudo, Hiroki Matsutani (Keio Univ.), Michihiro Koibuchi (NII), Hideharu Amano (Keio Univ.)
(43)
CPSY
18:00-18:30 A Routing Strategy for Dynamic Link Allocation Using FSO CPSY2015-44 Tomoya Ozaki (Keio Univ.), Michihiro Koibuchi (NII), Hideharu Amano, Hiroki Matsutani (Keio Univ.)
  18:30-18:40 Break ( 10 min. )
  - BoF (18:40-20:40)

Announcement for Speakers
General TalkEach speech will have 25 minutes for presentation and 5 minutes for discussion.

Contact Address and Latest Schedule Information
CPSY Technical Committee on Computer Systems (CPSY)   [Latest Schedule]
Contact Address Takashi Miyoshi (FUJITSU)
TEL +81-44-754-2931, FAX +81-44-754-2672
E--mail:

CPSY WEB
http://www.ieice.or.jp/iss/cpsy/jpn/ 
DC Technical Committee on Dependable Computing (DC)   [Latest Schedule]
Contact Address  


Last modified: 2015-08-04 12:55:04


Notification: Mail addresses are partially hidden against SPAM.

[Download Paper's Information (in Japanese)] <-- Press download button after click here.
 
[Cover and Index of IEICE Technical Report by Issue]
 

[Presentation and Participation FAQ] (in Japanese)
 

[Return to CPSY Schedule Page]   /   [Return to DC Schedule Page]   /  
 
 Go Top  Go Back   Prev CPSY Conf / Next CPSY Conf [HTML] / [HTML(simple)] / [TEXT]  [Japanese] / [English] 


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan