IEICE Technical Committee Submission System
Advance Program
Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top  Go Back   Prev CPM Conf / Next CPM Conf [HTML] / [HTML(simple)] / [TEXT]  [Japanese] / [English] 


Technical Committee on Component Parts and Materials (CPM) [schedule] [select]
Chair Kiyoshi Ishii
Vice Chair Kiichi Kamimura
Secretary Toru Matsuura, Seiji Toyoda
Assistant Hidehiko Shimizu, Yasushi Takemura

Technical Committee on Integrated Circuits and Devices (ICD) [schedule] [select]
Chair Masao Nakaya
Vice Chair Akira Matsuzawa
Secretary Koji Kai, Yoshiharu Aimoto
Assistant Makoto Nagata, Minoru Fujishima

Conference Date Thu, Jan 18, 2007 09:00 - 17:00
Fri, Jan 19, 2007 09:00 - 16:35
Topics LSI system assembly and module/inteface technology, test, general 
Conference Place  

Thu, Jan 18 AM 
09:00 - 10:40
(1) 09:00-09:25 On-Die Monitoring of Substrate Coupling for Mixed-Signal Circuit Isolation Takumi Danjo, Daisuke Kosaka, Makoto Nagata (Kobe Univ.)
(2) 09:25-09:50 Study on Active Substrate Noise Cancelling Technique using Power Line di/dt Detector Taisuke Kazama (Univ. of Tokyo), Makoto Ikeda, Kunihiro Asada (VDEC)
(3) 09:50-10:15 Measurement of Delay Variation Due to Inductive Coupling Noise in 90nm Global Interconnects Yasuhiro Ogasahara, Masanori Hashimoto, Takao Onoye (Osaka Univ.)
(4) 10:15-10:40 Measurement of Delay Degradation Due to Power Supply Noise and Delay Variation Estimation with Full-Chip Simulation Yasuhiro Ogasahara, Takashi Enami, Masanori Hashimoto (Osaka Univ.), Takashi Sato (Tokyo Inst. Tech.), Takao Onoye (Osaka Univ.)
  10:40-10:55 Break ( 15 min. )
Thu, Jan 18 AM 
10:55 - 12:10
(5) 10:55-11:20 Delay Variation Analysis in Consideration of Dynamic Power Supply Noise Waveform Mitsuya Fukazawa, Makoto Nagata (Kobe Univ.)
(6) 11:20-12:10 [Special Invited Talk]
Proximity Inter-chip Communications
Tadahiro Kuroda, Kiichi Niitsu (Keio Univ.)
  12:10-13:00 Lunch Break ( 50 min. )
Thu, Jan 18 PM 
13:00 - 15:05
(7) 13:00-13:50 [Invited Talk]
Fine electronic cuircuit pattern formation by various metal nanoparticle pastes
-- Approach by the design of metal nanoparticles --
Masami Nakamoto (Osaka Munic. Tech. Res. Inst.)
(8) 13:50-14:15 “In Situ” Evaluation for On-Chip Inductors Using Impedance Balance Method Mizuki Motoyoshi, Minoru Fujishima (The Univ. of Tokyo)
(9) 14:15-14:40 Design of Wideband tuning VCO for TV Receiver System Takatsugu Kamata, Toshimasa Matsuoka, Kenji Taniguchi (Osaka Univ.)
(10) 14:40-15:05 An Integrated 20-26 GHz CMOS Up-Conversion Mixer with Low Power Consumption Yuki Kambayashi, Ivan Chee Hong Lai, Minoru Fujishima (U.T.)
  15:05-15:20 Break ( 15 min. )
Thu, Jan 18 PM 
15:20 - 17:00
(11) 15:20-16:10 [Special Invited Talk]
3-Dimensional Packaging Technology and Super-Chip Integration
Tetsu Tanaka, Takafumi Fukushima, Mitsumasa Koyanagi (Tohoku Univ.)
  16:10-16:35 Break(Presentation cancel) ( 25 min. )
(12) 16:35-17:00 Local deformation and residual stress of thin chips stacked by flip chip structures Hideo Miura, Nobuki Ueta, Yuki Sato (Tohoku Univ.)
Fri, Jan 19 AM 
09:00 - 10:40
(13) 09:00-09:25 Development of Packages for Ultra-violet Light-Emitting Diodes
-- Approach to high-light-extraction efficiency by Flip-Chip packages --
Iwao Mitsuishi, Shinya Nunoue, Hiroshi Yamada, Shinya Nunoue (Toshiba)
(14) 09:25-09:50 Ultra-Fine Pitch Cu Bumpless Interconnect for High Density System Integration Aktisu Shigetou, Toshihiro Itoh, Tadatomo Suga (Univ. of Tokyo)
(15) 09:50-10:15 Modeling of Wire Bonding Process for High Performance Device Eiichi Yamada, Masazumi Amagai (TI Japan)
(16) 10:15-10:40 Signal Transmission Guideline in IC Package Kentaro Takao, Chikara Azuma, Masazumi Amagai (TIJ)
  10:40-10:55 Break ( 15 min. )
Fri, Jan 19 AM 
10:55 - 12:10
(17) 10:55-11:20 Failure analysis system to classify failure modes using combination of FBMs Hitoshi Maeda, Fumihito Ohta, Michio Kuniya, Koji Fukumoto (Renesas Technology)
(18) 11:20-11:45 Improvement of layout analysis by connecting emission/OBIRCH analysis with CAD data Akira Shimase, Akihito Uchikado, Mitsuaki Saeki, Shinichi Watarai, Takeshi Suzuki, Toshiyuki Majima (Renesas), Kazuhiro Hotta, Hirotoshi Terada (HPK)
(19) 11:45-12:10 SoC macro-block diagnosis using extracted layout information Katsuyoshi Miura, Koji Nakamae (Osaka Univ.)
  12:10-13:00 Lunch Break ( 50 min. )
Fri, Jan 19 PM 
13:00 - 14:15
(20) 13:00-13:25 A Constrained Test Generation Method for Low Power Testing Yoshiaki Tounoue, Xiaoqing Wen, Seiji Kajihara (K I T), Kohei Miyase (JST), Tatsuya Suzuki, Yuta Yamato (K I T)
(21) 13:25-13:50 A Note on 100x Test Data Compression for Scan-Based BIST Masayuki Arai, Satoshi Fukumoto, Kazuhiko Iwasaki (Tokyo Metro. Univ.), Tatsuru Matsuo, Takahisa Hiraide (Fujitsu Lab.), Hideaki Konishi, Michiaki Emori, Takashi Aikyo (Fujitsu)
(22) 13:50-14:15 Investigation on estimation methods of faulty parameters for analog circuits Norio Kuji (Hachinohe National C. T.)
  14:15-14:30 Break ( 15 min. )
Fri, Jan 19 PM 
14:30 - 16:35
(23) 14:30-15:20 [Special Invited Talk]
Integrated RF MEMS and Its Packaging Technology
Kei Kuwabara, Norio Sato (NTT), Katsuyuki Machida (NTT-AT), Hiromu Ishii, Munenari Kawashima, Yo Yamaguchi, Kazuhiro Uehara (NTT)
(24) 15:20-15:45 Effects of the Board Power/Ground Layer Configuration on Simultaneous Switching Noise(SSN)and EMI Takanobu Kushihira (MSC), Toshio Sudo (Toshiba)
(25) 15:45-16:10 Wid eband Decoupling Properties by the Combination of Ultra-thin Insulator and EBG Structure Seiju Ichijo (Toshiba), Takanobu Kushihira (MSC), Toshio Sudo (Toshiba)
(26) 16:10-16:35 EMI Reducing Techniques for Low Voltage Differential Signaling by applying a Vertically Differential Method and Data arrangement optimization Ayako Takagi, Masahiro Baba, Haruhiko Okumura (Toshiba Corp. R&D Ctr.)

Announcement for Speakers
General TalkEach speech will have 20 minutes for presentation and 5 minutes for discussion.
Invited TalkEach speech will have 40 minutes for presentation and 10 minutes for discussion.

Contact Address and Latest Schedule Information
CPM Technical Committee on Component Parts and Materials (CPM)   [Latest Schedule]
Contact Address Tohru Matsuura (ATR)
TEL 0774-95-1173, FAX 0774-95-1178
E-: hmatr

Seiji Toyoda(NTT)
TEL 0422-59-7365, FAX 0422-59-5575
E-: i

Hidehiko Shimizu(Niigata University)
TEL 025-262-6811, FAX 025-262-6811
E-: engi-u

Yasushi Takemura(Yokohama National University)
TEL 045-339-4151, FAX 045-339-4151
E-: y

Hiroshi Yamada (Toshiba)
TEL 044-549-2141, FAX 045-520-1501
E-: ba 
ICD Technical Committee on Integrated Circuits and Devices (ICD)   [Latest Schedule]
Contact Address Makoto Nagata (Kobe University)
TEL 078-803-6569,FAX 078-803-6221
E-:be-u

Toshimasa Matsuoka (Osaka University)
TEL 06-6879-7792,FAX 06-6879-7792
E-:be-u 


Last modified: 2007-02-26 21:57:43


Notification: Mail addresses are partially hidden against SPAM.

[Download Paper's Information (in Japanese)] <-- Press download button after click here.
 

[On-Site Price List of Paper Version of Proceedings (Technical Report)] (in Japanese)
 
[Presentation and Participation FAQ] (in Japanese)
 
[Cover and Index of IEICE Technical Report by Issue]
 

[Return to CPM Schedule Page]   /   [Return to ICD Schedule Page]   /  
 
 Go Top  Go Back   Prev CPM Conf / Next CPM Conf [HTML] / [HTML(simple)] / [TEXT]  [Japanese] / [English] 


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan