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Technical Committee on VLSI Design Technologies (VLD)  (2022 - )

Chair: Minako Ikeda (NTT) Vice Chair: Shigetoshi Nakatake (Univ. of Kitakyushu)
Secretary: Makoto Miyamura (NBS), Masashi Imai (Hirosaki Univ.)
Assistant: Takuma Nishimoto (Hitachi)

[Go to Official VLD Homepage (Japanese)] 
 Schedule  (Sort by: Date Ascending)
 Results 1 - 3 of 3  /   
Date Place Topics Joint Deadline Select Menu
Mon, May 9, 2022
- Tue, May 10 (tentative)

(Primary: On-site, Secondary: Online)
  ICD, CPSY, DC, HWS, IPSJ-SLDM, IPSJ-ARC
(2nd)
 
  • Detailed Info.
       (Japanese)
     
  • Thu, Jun 16, 2022
    - Fri, Jun 17
    Hachinohe Institute of Technology
    (Primary: On-site, Secondary: Online)
      CAS, SIP, MSS [Fri, Apr 15]
  • Regist. Closed
  • Adv. Program
  • Registration Fee 
  • Mon, Nov 28, 2022
    - Wed, Nov 30
    Kanazawa Bunka Hall
    (Primary: On-site, Secondary: Online)
    Design Gaia 2022 -New Field of VLSI Design- VLD, DC, RECONF, ICD, IPSJ-SLDM
    (Joint) [detail]
     
  • Regist. Waiting
  • Registration Fee 
  •  Results 1 - 3 of 3  /   


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