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Paper Abstract and Keywords
Presentation 2022-06-17 10:00
[Panel Discussion] Contributions of System and Signal Processing Subsociety to the SDGs
Shigemasa Takai (Osaka Univ.), Yoshinobu Maeda (Niigata Univ.), Namiko Ikeda (NTT), Toshihisa Tanaka (TUAT), Atsuo Ozaki (OIT) CAS2022-11 VLD2022-11 SIP2022-42 MSS2022-11
Abstract (in Japanese) (See Japanese page) 
(in English) The four technical committees (TCs) on Systems and Signal Processing subsociety, i.e.,
TCs of Circuits and Systems (CAS), VLSI Design Technologies (VLD), Signal Processing (SIP),
and Mathematical Systems Science and its Applications (MSS),
have been holding joint research meetings since 2010.
In order to enhance the significance of the Joint Study Group,
a panel discussion is held with the subsociety chair as moderator and
the representatives of the TCs as panelists.
Recently, academic societies have been expected to contribute to solving social problems.
In this panel discussion, we discuss how System and Signal Processing Subsociety contributes
to achieving the SDGs through exchanging information on the activity of each TC.
Keyword (in Japanese) (See Japanese page) 
(in English) Contributions to the SDGs / Circuits and Systems / VLSI Design Technologies / Signal Processing / Mathematical Systems Science and its Applications / / /  
Reference Info. IEICE Tech. Rep., vol. 122, no. 78, MSS2022-11, pp. 58-60, June 2022.
Paper # MSS2022-11 
Date of Issue 2022-06-09 (CAS, VLD, SIP, MSS) 
ISSN Online edition: ISSN 2432-6380
Copyright
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reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CAS2022-11 VLD2022-11 SIP2022-42 MSS2022-11

Conference Information
Committee CAS SIP VLD MSS  
Conference Date 2022-06-16 - 2022-06-17 
Place (in Japanese) (See Japanese page) 
Place (in English) Hachinohe Institute of Technology 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To MSS 
Conference Code 2022-06-CAS-SIP-VLD-MSS 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Contributions of System and Signal Processing Subsociety to the SDGs 
Sub Title (in English)  
Keyword(1) Contributions to the SDGs  
Keyword(2) Circuits and Systems  
Keyword(3) VLSI Design Technologies  
Keyword(4) Signal Processing  
Keyword(5) Mathematical Systems Science and its Applications  
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1st Author's Name Shigemasa Takai  
1st Author's Affiliation Osaka University (Osaka Univ.)
2nd Author's Name Yoshinobu Maeda  
2nd Author's Affiliation Niigata University (Niigata Univ.)
3rd Author's Name Namiko Ikeda  
3rd Author's Affiliation Nippon Telegraph and Telephone Corporation (NTT)
4th Author's Name Toshihisa Tanaka  
4th Author's Affiliation Tokyo University of Agriculture and Technology (TUAT)
5th Author's Name Atsuo Ozaki  
5th Author's Affiliation Osaka Institute of Technology (OIT)
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Speaker Author-1 
Date Time 2022-06-17 10:00:00 
Presentation Time 90 minutes 
Registration for MSS 
Paper # CAS2022-11, VLD2022-11, SIP2022-42, MSS2022-11 
Volume (vol) vol.122 
Number (no) no.75(CAS), no.76(VLD), no.77(SIP), no.78(MSS) 
Page pp.58-60 
#Pages
Date of Issue 2022-06-09 (CAS, VLD, SIP, MSS) 


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