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| Presentation | 2021-12-02 14:20 Wafer-level Variation Modeling for Multi-site Testing of RF Circuits Riaz-ul-haque Mian (Shimane Univ.), Michihiro Shintani (NAIST)  VLD2021-42 ICD2021-52 DC2021-48 RECONF2021-50 Link to ES Tech. Rep. Archives: ICD2021-52 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | Wafer-level performance prediction has been attracting attention to reduce measurement costs without compromising test quality in production tests. Although several efficient methods have been proposed, the site– to-site variation, which is often observed in multi-site testing for radio frequency circuits, has not yet been addressed. In this paper, we propose a wafer-level performance prediction method for multi-site testing that can consider the site-to-site variation. The proposed method is based on the Gaussian process, improving the prediction accuracy by extending hierarchical modeling to exploit the test site information provided by test engineers. In addition, we propose an active test-site sampling method to maximize measurement cost reduction. Through experiments using production test data, we demonstrate that the proposed method can reduce the estimation error to 1/19 of that obtained using a conventional method. We also demonstrate that the proposed sampling method can reduce the number of the measurements by 97% while achieving sufficient estimation accuracy. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Wafer-level characterization modeling / Multi-site test / Gaussian process / / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 121, no. 277, VLD2021-42, pp. 144-149, Dec. 2021. | |
| Paper # | VLD2021-42 | |
| Date of Issue | 2021-11-24 (VLD, ICD, DC, RECONF) | |
| ISSN | Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | VLD2021-42 ICD2021-52 DC2021-48 RECONF2021-50 Link to ES Tech. Rep. Archives: ICD2021-52 |
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| Conference Information | |
| Committee | VLD DC RECONF ICD IPSJ-SLDM |
| Conference Date | 2021-12-01 - 2021-12-02 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Online |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Gaia 2021 -New Field of VLSI Design- |
| Paper Information | |
| Registration To | VLD |
| Conference Code | 2021-12-VLD-DC-RECONF-ICD-SLDM |
| Language | English (Japanese title is available) |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Wafer-level Variation Modeling for Multi-site Testing of RF Circuits |
| Sub Title (in English) | |
| Keyword(1) | Wafer-level characterization modeling |
| Keyword(2) | Multi-site test |
| Keyword(3) | Gaussian process |
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| 1st Author's Name | Riaz-ul-haque Mian |
| 1st Author's Affiliation | Shimane University (Shimane Univ.) |
| 2nd Author's Name | Michihiro Shintani |
| 2nd Author's Affiliation | Nara Institute of Science and Technology (NAIST) |
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| Speaker | Author-1 |
| Date Time | 2021-12-02 14:20:00 |
| Presentation Time | 25 minutes |
| Registration for | VLD |
| Paper # | VLD2021-42, ICD2021-52, DC2021-48, RECONF2021-50 |
| Volume (vol) | vol.121 |
| Number (no) | no.277(VLD), no.278(ICD), no.279(DC), no.280(RECONF) |
| Page | pp.144-149 |
| #Pages | 6 |
| Date of Issue | 2021-11-24 (VLD, ICD, DC, RECONF) |
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