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Presentation 2021-08-18 15:35
Evaluation of Side-channel Leakage on High-speed Asynchronous Successive Approximation Register AD Converters
Ryozo Takahashi, Kazuki Monta, Takuji Miki, Makoto Nagata (Kobe Univ.) SDM2021-43 ICD2021-14 Link to ES Tech. Rep. Archives: SDM2021-43 ICD2021-14
Abstract (in Japanese) (See Japanese page) 
(in English) This paper presents an evaluation of security level on high-speed asynchronous successive approximation register (SAR) analog-to-digital converters. The SAR logic asynchronously controls the next comparison voltage of the following bits based on the current comparison result, which enhances the operation speed of SAR AD converters. However, the fatal feature is raised that the operation timing of the asynchronous logic depends on the input signal. Utilizing this characteristic, a side-channel attack on asynchronous SAR AD converters by analyzing the power noise and restoring the input data can be a serious threat. In this paper, we designed the high-speed asynchronous SAR AD converters in 40 nm CMOS to evaluate the side-channel leakage. To acquire the power supply noise waveform information in detail, an on-chip noise monitor circuits were also embedded on the same chip. The noise monitor circuits include a wide-band inputs to monitor the operating noise of high-speed asynchronous logic. From the evaluation results, we confirmed the timing information with a high correlation to the input signal exists on the operating power supply noise waveform of the asynchronous SAR ADC acquired by the on-chip noise monitor circuits.
Keyword (in Japanese) (See Japanese page) 
(in English) Successive Approximation Register AD Converter / Asynchronous Logic / Side-channel Leakage / / / / /  
Reference Info. IEICE Tech. Rep., vol. 121, no. 139, ICD2021-14, pp. 68-71, Aug. 2021.
Paper # ICD2021-14 
Date of Issue 2021-08-10 (SDM, ICD) 
ISSN Online edition: ISSN 2432-6380
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All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF SDM2021-43 ICD2021-14 Link to ES Tech. Rep. Archives: SDM2021-43 ICD2021-14

Conference Information
Committee SDM ICD ITE-IST  
Conference Date 2021-08-17 - 2021-08-18 
Place (in Japanese) (See Japanese page) 
Place (in English) Online 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Analog, Mixed Analog and Digital, RF, and Sensor Interface, Low Voltage/Low Power Techniques, Novel Devices/Circuits, and the Applications 
Paper Information
Registration To ICD 
Conference Code 2021-08-SDM-ICD-IST 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Evaluation of Side-channel Leakage on High-speed Asynchronous Successive Approximation Register AD Converters 
Sub Title (in English)  
Keyword(1) Successive Approximation Register AD Converter  
Keyword(2) Asynchronous Logic  
Keyword(3) Side-channel Leakage  
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1st Author's Name Ryozo Takahashi  
1st Author's Affiliation Kobe University (Kobe Univ.)
2nd Author's Name Kazuki Monta  
2nd Author's Affiliation Kobe University (Kobe Univ.)
3rd Author's Name Takuji Miki  
3rd Author's Affiliation Kobe University (Kobe Univ.)
4th Author's Name Makoto Nagata  
4th Author's Affiliation Kobe University (Kobe Univ.)
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Speaker Author-1 
Date Time 2021-08-18 15:35:00 
Presentation Time 25 minutes 
Registration for ICD 
Paper # SDM2021-43, ICD2021-14 
Volume (vol) vol.121 
Number (no) no.138(SDM), no.139(ICD) 
Page pp.68-71 
#Pages
Date of Issue 2021-08-10 (SDM, ICD) 


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