Paper Abstract and Keywords |
Presentation |
2021-07-06 10:00
Circuit Structure of PUF using Leakage Current and Simulation Evaluation Tomoaki Oikawa, Kimiyoshi Usami (Shibaura Inst. of Tech.) CAS2021-9 VLD2021-9 SIP2021-19 MSS2021-9 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
One of the LSI individual identification technologies is PUF (Physically Unclonable Function), which utilizes the physical characteristics of semiconductors. This technology is expected to make it possible to authenticate genuine products and prevent the distribution of counterfeit products. However, in recent years, the possibility of authentication evasion has been pointed out due to the development of machine learning. In this study, we propose a PUF (LR-PUF: Leak Racing PUF) that uses sub-threshold leakage current to improve the resistance to machine learning. We also implement the LR-PUF as a circuit and perform simulation evaluation. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
PUF / Security / Leakage Current / Manufacturing Variation / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 121, no. 90, VLD2021-9, pp. 42-47, July 2021. |
Paper # |
VLD2021-9 |
Date of Issue |
2021-06-28 (CAS, VLD, SIP, MSS) |
ISSN |
Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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CAS2021-9 VLD2021-9 SIP2021-19 MSS2021-9 |
Conference Information |
Committee |
SIP CAS VLD MSS |
Conference Date |
2021-07-05 - 2021-07-06 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Online |
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(See Japanese page) |
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Paper Information |
Registration To |
VLD |
Conference Code |
2021-07-SIP-CAS-VLD-MSS |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Circuit Structure of PUF using Leakage Current and Simulation Evaluation |
Sub Title (in English) |
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PUF |
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Security |
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Leakage Current |
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Manufacturing Variation |
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1st Author's Name |
Tomoaki Oikawa |
1st Author's Affiliation |
Shibaura Institute of Technology (Shibaura Inst. of Tech.) |
2nd Author's Name |
Kimiyoshi Usami |
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Shibaura Institute of Technology (Shibaura Inst. of Tech.) |
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Speaker |
Author-1 |
Date Time |
2021-07-06 10:00:00 |
Presentation Time |
25 minutes |
Registration for |
VLD |
Paper # |
CAS2021-9, VLD2021-9, SIP2021-19, MSS2021-9 |
Volume (vol) |
vol.121 |
Number (no) |
no.89(CAS), no.90(VLD), no.91(SIP), no.92(MSS) |
Page |
pp.42-47 |
#Pages |
6 |
Date of Issue |
2021-06-28 (CAS, VLD, SIP, MSS) |
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