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Paper Abstract and Keywords
Presentation 2021-03-04 15:20
Power Analysis Attack on a Unrolled Midori128 and its Evaluation
Shu Takemoto, Yoshiya Ikezaki, Yusuke Nozaki, Masaya Yoshikawa (Meijo Univ.) VLD2020-87 HWS2020-62
Abstract (in Japanese) (See Japanese page) 
(in English) The lightweight block cipher Midori has been proposed as a cryptographic algorithm for low-power operation, which is important as a security measure for IoT devices with power supply issues. For IoT devices that require real-time performance as well as low-power operation, a low-latency hardware implementation is suitable. On the other hand, some lightweight cryptography is vulnerable to side-channel attacks, and tamper-resistance verification is very important. Also, a low-latency implementation of Midori128 with a block length of 128 bits has not been reported to be tamper-resistant to a power analysis attack, which is one of the side-channel attacks. Therefore, this study proposes a power analysis attack method for Midori128, and demonstrate that power analysis information occurs in Midori128.
Keyword (in Japanese) (See Japanese page) 
(in English) hardware security / side-channel attack / power analysis attack / lightweght block cipher / Midori / / /  
Reference Info. IEICE Tech. Rep., vol. 120, no. 401, HWS2020-62, pp. 108-113, March 2021.
Paper # HWS2020-62 
Date of Issue 2021-02-24 (VLD, HWS) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee HWS VLD  
Conference Date 2021-03-03 - 2021-03-04 
Place (in Japanese) (See Japanese page) 
Place (in English) Online 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Technology for System-on-Silicon, Hardware Security, etc. 
Paper Information
Registration To HWS 
Conference Code 2021-03-HWS-VLD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Power Analysis Attack on a Unrolled Midori128 and its Evaluation 
Sub Title (in English)  
Keyword(1) hardware security  
Keyword(2) side-channel attack  
Keyword(3) power analysis attack  
Keyword(4) lightweght block cipher  
Keyword(5) Midori  
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1st Author's Name Shu Takemoto  
1st Author's Affiliation Meijo University (Meijo Univ.)
2nd Author's Name Yoshiya Ikezaki  
2nd Author's Affiliation Meijo University (Meijo Univ.)
3rd Author's Name Yusuke Nozaki  
3rd Author's Affiliation Meijo University (Meijo Univ.)
4th Author's Name Masaya Yoshikawa  
4th Author's Affiliation Meijo University (Meijo Univ.)
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Speaker
Date Time 2021-03-04 15:20:00 
Presentation Time 25 
Registration for HWS 
Paper # IEICE-VLD2020-87,IEICE-HWS2020-62 
Volume (vol) IEICE-120 
Number (no) no.400(VLD), no.401(HWS) 
Page pp.108-113 
#Pages IEICE-6 
Date of Issue IEICE-VLD-2021-02-24,IEICE-HWS-2021-02-24 


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