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Paper Abstract and Keywords
Presentation 2021-03-04 14:15
Experiments of Data Authenticity Verification in Multi-Node IoT Systems Using Elliptic Curve Digital Signature Chips
Yuya Takahashi, Takuya Matsumaru, Kazuki Monta (Kobe Univ.), Toshihiro Sato, Takaaki Okidono (ECSEC Lab), Takuji Miki, Noriyuki Miura, Makoto Nagata (Kobe Univ.) VLD2020-85 HWS2020-60
Abstract (in Japanese) (See Japanese page) 
(in English) Practicality of IoT systems requires the efficiency and speed of crypto processing in edge nodes and remote servers. So far software implementation is often present for wide-area system realization, however, the validity of hardware or hybrid implementation is not much pursued. In our previous works, ECDSA chips for digital signature generation and verification have been developed in a 130 nm CMOS technology. This paper reports the evaluation results of pseudo IoT networks adopting those ECDSA chips in terms of data transfer, signature verification and system-level throughputs.
Keyword (in Japanese) (See Japanese page) 
(in English) Elliptic Curve Digital Signature / Digital Signature / Hardware Accelerator / Signature / IoT / ASIC / FPGA /  
Reference Info. IEICE Tech. Rep., vol. 120, no. 401, HWS2020-60, pp. 97-101, March 2021.
Paper # HWS2020-60 
Date of Issue 2021-02-24 (VLD, HWS) 
ISSN Online edition: ISSN 2432-6380
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reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee HWS VLD  
Conference Date 2021-03-03 - 2021-03-04 
Place (in Japanese) (See Japanese page) 
Place (in English) Online 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Technology for System-on-Silicon, Hardware Security, etc. 
Paper Information
Registration To HWS 
Conference Code 2021-03-HWS-VLD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Experiments of Data Authenticity Verification in Multi-Node IoT Systems Using Elliptic Curve Digital Signature Chips 
Sub Title (in English)  
Keyword(1) Elliptic Curve Digital Signature  
Keyword(2) Digital Signature  
Keyword(3) Hardware Accelerator  
Keyword(4) Signature  
Keyword(5) IoT  
Keyword(6) ASIC  
Keyword(7) FPGA  
Keyword(8)  
1st Author's Name Yuya Takahashi  
1st Author's Affiliation Kobe University (Kobe Univ.)
2nd Author's Name Takuya Matsumaru  
2nd Author's Affiliation Kobe University (Kobe Univ.)
3rd Author's Name Kazuki Monta  
3rd Author's Affiliation Kobe University (Kobe Univ.)
4th Author's Name Toshihiro Sato  
4th Author's Affiliation ECSEC Laboratory (ECSEC Lab)
5th Author's Name Takaaki Okidono  
5th Author's Affiliation ECSEC Laboratory (ECSEC Lab)
6th Author's Name Takuji Miki  
6th Author's Affiliation Kobe University (Kobe Univ.)
7th Author's Name Noriyuki Miura  
7th Author's Affiliation Kobe University (Kobe Univ.)
8th Author's Name Makoto Nagata  
8th Author's Affiliation Kobe University (Kobe Univ.)
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Speaker Author-1 
Date Time 2021-03-04 14:15:00 
Presentation Time 25 minutes 
Registration for HWS 
Paper # VLD2020-85, HWS2020-60 
Volume (vol) vol.120 
Number (no) no.400(VLD), no.401(HWS) 
Page pp.97-101 
#Pages
Date of Issue 2021-02-24 (VLD, HWS) 


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