Paper Abstract and Keywords |
Presentation |
2020-11-17 10:55
DET Flip-Flops with SEU Detection Capability Using DICE and C-Element Xu Haijia, Kazuteru Namba (Chiba Univ.) VLD2020-14 ICD2020-34 DC2020-34 RECONF2020-33 Link to ES Tech. Rep. Archives: ICD2020-34 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
Abstract A dual-edge-triggered flip-flop (DET-FF) composed of DICE latch (Dual Interlocked Storage Cell) and C-element for SEU detection has been proposed in this article. The DICE latch has the ability to tolerate SNUs. This design can tolerate most of the SNU that may occur in DET-FF. In addition, this article also presents a circuit design that can detect soft-errors having not been detected by DET-FF. The proposed DET-FF reduces power consumption, while the DICE unit can always guarantee the characteristics of two stable nodes, so that the proposed circuit design can tolerate and detect soft-errors which occur in the circuit while reducing power consumption. The design has been simulated with CMOS circuit, and the results show that the DET-FF is tolerant to soft-errors and can detect SEU (Single Event Upset) events which affect the output results |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Soft error / DICE / Dual-edge-triggered-FF / Radiation tolerant latch / Low power / / / |
Reference Info. |
IEICE Tech. Rep., vol. 120, no. 236, DC2020-34, pp. 18-23, Nov. 2020. |
Paper # |
DC2020-34 |
Date of Issue |
2020-11-10 (VLD, ICD, DC, RECONF) |
ISSN |
Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
Download PDF |
VLD2020-14 ICD2020-34 DC2020-34 RECONF2020-33 Link to ES Tech. Rep. Archives: ICD2020-34 |
Conference Information |
Committee |
VLD DC RECONF ICD IPSJ-SLDM |
Conference Date |
2020-11-17 - 2020-11-18 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Online |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Design Gaia 2020 -New Field of VLSI Design- |
Paper Information |
Registration To |
DC |
Conference Code |
2020-11-VLD-DC-RECONF-ICD-SLDM |
Language |
English |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
DET Flip-Flops with SEU Detection Capability Using DICE and C-Element |
Sub Title (in English) |
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Soft error |
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DICE |
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Dual-edge-triggered-FF |
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Radiation tolerant latch |
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Low power |
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1st Author's Name |
Xu Haijia |
1st Author's Affiliation |
Chiba University (Chiba Univ.) |
2nd Author's Name |
Kazuteru Namba |
2nd Author's Affiliation |
Chiba University (Chiba Univ.) |
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Speaker |
Author-1 |
Date Time |
2020-11-17 10:55:00 |
Presentation Time |
25 minutes |
Registration for |
DC |
Paper # |
VLD2020-14, ICD2020-34, DC2020-34, RECONF2020-33 |
Volume (vol) |
vol.120 |
Number (no) |
no.234(VLD), no.235(ICD), no.236(DC), no.237(RECONF) |
Page |
pp.18-23 |
#Pages |
6 |
Date of Issue |
2020-11-10 (VLD, ICD, DC, RECONF) |
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