Paper Abstract and Keywords |
Presentation |
2020-03-04 13:00
MTJ-based Nonvolatile Flip-Flop Circuit Using Dual Power Supplies for Low-voltage Operation Sosuke Akiba, Kimiyoshi Usami (SIT) VLD2019-99 HWS2019-72 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
One of the leakage reduction techniques is nonvolatile power gating(NVPG) by using magnetic tunnel junction(MTJ). In the NVPG, volatile circuits such as a flip-flop are made nonvolatile by applying the MTJ, so solving the problem of losing data due to power off of the PG. However, when the power supply voltage for nonvolatile flip-flop (NVFF) is lowered gradually, writing to MTJ and reading from MTJ (nonvolatile operation) do not work properly. Although we have to choose the power supply voltage of NVFF within the limit of working nonvolatile operation properly, we want to make logic circuits including the FF operate at a low voltage for power consumption. In this paper, in order to enable normal operation in NVFF at lower voltage, we propose NVFF circuit using two power supplies. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Power-Gating / MTJ / Flip-Flop / / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 119, no. 443, VLD2019-99, pp. 31-36, March 2020. |
Paper # |
VLD2019-99 |
Date of Issue |
2020-02-26 (VLD, HWS) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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VLD2019-99 HWS2019-72 |
Conference Information |
Committee |
HWS VLD |
Conference Date |
2020-03-04 - 2020-03-07 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Okinawa Ken Seinen Kaikan |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Design Technology for System-on-Silicon, Hardware Security, etc. |
Paper Information |
Registration To |
VLD |
Conference Code |
2020-03-HWS-VLD |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
MTJ-based Nonvolatile Flip-Flop Circuit Using Dual Power Supplies for Low-voltage Operation |
Sub Title (in English) |
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Power-Gating |
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MTJ |
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Flip-Flop |
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1st Author's Name |
Sosuke Akiba |
1st Author's Affiliation |
Shibaura Institute of Technology (SIT) |
2nd Author's Name |
Kimiyoshi Usami |
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Shibaura Institute of Technology (SIT) |
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Speaker |
Author-1 |
Date Time |
2020-03-04 13:00:00 |
Presentation Time |
25 minutes |
Registration for |
VLD |
Paper # |
VLD2019-99, HWS2019-72 |
Volume (vol) |
vol.119 |
Number (no) |
no.443(VLD), no.444(HWS) |
Page |
pp.31-36 |
#Pages |
6 |
Date of Issue |
2020-02-26 (VLD, HWS) |
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