Paper Abstract and Keywords |
Presentation |
2020-01-22 14:45
Performance Evaluation of Using Multi-Switch on a Multi-FPGA System Kohei Ito, Kensuke Iizuka, Yugo Yamauchi, Kazuei Hironaka (Keio Univ.), Yao Hu, Michihiro Koibuchi (NII), Hideharu Amano (Keio Univ.) VLD2019-60 CPSY2019-58 RECONF2019-50 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
Flow-in-Cloud(FiC) is a system which consists of multiple middle-range FPGAs connected by high-speed serial links, and is developed to execute applications such as deep learning in the cloud or multi-access edge computing.
On the FiC, a large application which cannot be implemented on a single FPGA can be implemented by using multiple FPGAs and divided application, so it is possible to scale at cost-efficiently than using a single high-end FPGA.
In this paper, we use four Static Time Division Multiplexing(STDM) switches implemented on each FiC board by Link Aggregation method which can increase the bandwidth by operating all switches in the same way, and by Slot Distribution method which can reduce slots by operating each switch individually.
And we implemented an application using the above two different methods.
As a result, we can improve the communication performance up to 2.76 times by using four switches compared to only one switch. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
multi-FPGA / STDM switch / FPGA-in-cloud / / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 119, no. 372, CPSY2019-58, pp. 37-42, Jan. 2020. |
Paper # |
CPSY2019-58 |
Date of Issue |
2020-01-15 (VLD, CPSY, RECONF) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
Download PDF |
VLD2019-60 CPSY2019-58 RECONF2019-50 |
Conference Information |
Committee |
IPSJ-SLDM RECONF VLD CPSY IPSJ-ARC |
Conference Date |
2020-01-22 - 2020-01-24 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Raiosha, Hiyoshi Campus, Keio University |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
FPGA Applications, etc. |
Paper Information |
Registration To |
CPSY |
Conference Code |
2020-01-SLDM-RECONF-VLD-CPSY-ARC |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Performance Evaluation of Using Multi-Switch on a Multi-FPGA System |
Sub Title (in English) |
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Keyword(1) |
multi-FPGA |
Keyword(2) |
STDM switch |
Keyword(3) |
FPGA-in-cloud |
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1st Author's Name |
Kohei Ito |
1st Author's Affiliation |
Keio University (Keio Univ.) |
2nd Author's Name |
Kensuke Iizuka |
2nd Author's Affiliation |
Keio University (Keio Univ.) |
3rd Author's Name |
Yugo Yamauchi |
3rd Author's Affiliation |
Keio University (Keio Univ.) |
4th Author's Name |
Kazuei Hironaka |
4th Author's Affiliation |
Keio University (Keio Univ.) |
5th Author's Name |
Yao Hu |
5th Author's Affiliation |
National Institute of Informaitc (NII) |
6th Author's Name |
Michihiro Koibuchi |
6th Author's Affiliation |
National Institute of Informaitc (NII) |
7th Author's Name |
Hideharu Amano |
7th Author's Affiliation |
Keio University (Keio Univ.) |
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Speaker |
Author-1 |
Date Time |
2020-01-22 14:45:00 |
Presentation Time |
25 minutes |
Registration for |
CPSY |
Paper # |
VLD2019-60, CPSY2019-58, RECONF2019-50 |
Volume (vol) |
vol.119 |
Number (no) |
no.371(VLD), no.372(CPSY), no.373(RECONF) |
Page |
pp.37-42 |
#Pages |
6 |
Date of Issue |
2020-01-15 (VLD, CPSY, RECONF) |
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