講演抄録/キーワード |
講演名 |
2020-01-17 13:15
[ポスター講演]Design and Evaluation of a 32-word by 8-bit Register File Using Adiabatic Quantum Flux Parametron Logic ○Tomohiro Tamura・Naoki Takeuchi・Christopher Ayala・Yuki Yamanashi・Nobuyuki Yoshikawa(Yokohama Natl. Univ.) SCE2019-50 エレソ技報アーカイブへのリンク:SCE2019-50 |
抄録 |
(和) |
(まだ登録されていません) |
(英) |
Extremely energy-efficient logic devices are required for future energy-efficient highperformance computing systems. Superconducting logic families are attractive because their energy consumption is much lower than that of CMOS circuits. We have been developing adiabatic quantum-fluxparametron (AQFP) logic, which is one of the energy-efficient superconducting logic families, to achieve extremly low-power microprocessors. In a previous study, we designed a 16-word by 4-bit register file, which was the largest register file using AQFP logic. In this study, we have achieved even larger register files, which can be reduced the area of a register file by adopting offset buffers and quantum flux parametron latches (QFPLs). We designed a 32word by 8-bit register file with circuit area and junction count of 9.4 mm by 8.2 mm and 18844, respectively. This reveals that a 32-word by 8-bit register file can be implemented in a 10 mm by 10 mm chip. The 32word by 8-bit register file are fabricated using the AIST 10 kA/cm2 Nb high-speed standard process (HSTP). |
キーワード |
(和) |
/ / / / / / / |
(英) |
Superconducting integrated circuit / Adiabatic Quantum Flux Parametron / Register File / Memory / / / / |
文献情報 |
信学技報, vol. 119, no. 369, SCE2019-50, pp. 83-86, 2020年1月. |
資料番号 |
SCE2019-50 |
発行日 |
2020-01-09 (SCE) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
著作権に ついて |
技術研究報告に掲載された論文の著作権は電子情報通信学会に帰属します.(許諾番号:10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
PDFダウンロード |
SCE2019-50 エレソ技報アーカイブへのリンク:SCE2019-50 |