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| Presentation | 2019-10-12 11:45 LSI Implementation and Its Evaluation of an Izhikevich Model Neuron Analog MOS Circuit Yuki Tamura, Satoshi Moriya, Tatsuki Kato, Masao Sakuraba, Shigeo Sato, Yoshihiko Horio (Tohoku Univ.)  MBE2019-44 NC2019-35 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | The Izhikevich neuron model, which can reproduce various spike activities with a small amount of calculation, is indispensable to construct a new neuromorphic hardware for high order and low power information processing like biological neural network. In the previous report, we proposed a new Izhikevich model neuron circuit based on the discrepancies between the Izhikevich neuron model and the Izhikevich model neuron circuit proposed by Wijekoon and Dudek in 2008, and investigated the dynamics of our proposed circuit by phase plane analysis and SPICE simulation. In this research, we implemented our proposed circuit on an LSI chip using 65nm CMOS technology and compared its dynamics with that of SPICE simulation. By LSI chip measurement, we successfully observed four types of spikes as expected. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Izhikevich Neuron Model / Analog Neuron Circuit / SPICE Simulation / Phase Plane Analysis / Analog LSI / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 119, no. 225, NC2019-35, pp. 69-73, Oct. 2019. | |
| Paper # | NC2019-35 | |
| Date of Issue | 2019-10-04 (MBE, NC) | |
| ISSN | Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | MBE2019-44 NC2019-35 |
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| Conference Information | |
| Committee | MBE NC |
| Conference Date | 2019-10-11 - 2019-10-12 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Paper Information | |
| Registration To | NC |
| Conference Code | 2019-10-MBE-NC |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | LSI Implementation and Its Evaluation of an Izhikevich Model Neuron Analog MOS Circuit |
| Sub Title (in English) | |
| Keyword(1) | Izhikevich Neuron Model |
| Keyword(2) | Analog Neuron Circuit |
| Keyword(3) | SPICE Simulation |
| Keyword(4) | Phase Plane Analysis |
| Keyword(5) | Analog LSI |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Yuki Tamura |
| 1st Author's Affiliation | Tohoku University (Tohoku Univ.) |
| 2nd Author's Name | Satoshi Moriya |
| 2nd Author's Affiliation | Tohoku University (Tohoku Univ.) |
| 3rd Author's Name | Tatsuki Kato |
| 3rd Author's Affiliation | Tohoku University (Tohoku Univ.) |
| 4th Author's Name | Masao Sakuraba |
| 4th Author's Affiliation | Tohoku University (Tohoku Univ.) |
| 5th Author's Name | Shigeo Sato |
| 5th Author's Affiliation | Tohoku University (Tohoku Univ.) |
| 6th Author's Name | Yoshihiko Horio |
| 6th Author's Affiliation | Tohoku University (Tohoku Univ.) |
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| Speaker | Author-1 |
| Date Time | 2019-10-12 11:45:00 |
| Presentation Time | 15 minutes |
| Registration for | NC |
| Paper # | MBE2019-44, NC2019-35 |
| Volume (vol) | vol.119 |
| Number (no) | no.224(MBE), no.225(NC) |
| Page | pp.69-73 |
| #Pages | 5 |
| Date of Issue | 2019-10-04 (MBE, NC) |
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