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Paper Abstract and Keywords
Presentation 2019-08-22 16:45
[Invited Talk] 3D Flash Memory Cell Reliability
Yuichiro Mitani, Harumi Seki, Takanori Asano, Yasushi Nakasaki (Toshiba Memory) R2019-26 EMD2019-24 CPM2019-25 OPE2019-53 LQE2019-31 Link to ES Tech. Rep. Archives: EMD2019-24 CPM2019-25 OPE2019-53 LQE2019-31
Abstract (in Japanese) (See Japanese page) 
(in English) As conventional planar NAND flash memories are limited from physical and electrical scaling point of view, the three-dimensional flash memories, in which memory cells are stacked vertically, has rapidly achieved maturity to keep a trend of increasing bit density and reducing bit cost. To realize more capacity, total number of layers are increasing (>64 layers) and multi-level cell (MLC) operations are indispensable (>3bit/cell). Extending this capacity trend requires highly-reliable memory cell. This paper focus on the typical charge-trap type memory cells, and the reliability issues will be discussed
Keyword (in Japanese) (See Japanese page) 
(in English) Flash memory / Reliability / Insulators / Defect / Trap / / /  
Reference Info. IEICE Tech. Rep., vol. 119, no. 169, R2019-26, pp. 35-38, Aug. 2019.
Paper # R2019-26 
Date of Issue 2019-08-15 (R, EMD, CPM, OPE, LQE) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
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Download PDF R2019-26 EMD2019-24 CPM2019-25 OPE2019-53 LQE2019-31 Link to ES Tech. Rep. Archives: EMD2019-24 CPM2019-25 OPE2019-53 LQE2019-31

Conference Information
Committee LQE OPE CPM EMD R  
Conference Date 2019-08-22 - 2019-08-23 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To R 
Conference Code 2019-08-LQE-OPE-CPM-EMD-R 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) 3D Flash Memory Cell Reliability 
Sub Title (in English)  
Keyword(1) Flash memory  
Keyword(2) Reliability  
Keyword(3) Insulators  
Keyword(4) Defect  
Keyword(5) Trap  
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1st Author's Name Yuichiro Mitani  
1st Author's Affiliation Toshiba Memory Corporation (Toshiba Memory)
2nd Author's Name Harumi Seki  
2nd Author's Affiliation Toshiba Memory Corporation (Toshiba Memory)
3rd Author's Name Takanori Asano  
3rd Author's Affiliation Toshiba Memory Corporation (Toshiba Memory)
4th Author's Name Yasushi Nakasaki  
4th Author's Affiliation Toshiba Memory Corporation (Toshiba Memory)
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Speaker Author-1 
Date Time 2019-08-22 16:45:00 
Presentation Time 45 minutes 
Registration for R 
Paper # R2019-26, EMD2019-24, CPM2019-25, OPE2019-53, LQE2019-31 
Volume (vol) vol.119 
Number (no) no.169(R), no.170(EMD), no.171(CPM), no.172(OPE), no.173(LQE) 
Page pp.35-38 
#Pages
Date of Issue 2019-08-15 (R, EMD, CPM, OPE, LQE) 


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