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Paper Abstract and Keywords
Presentation 2019-07-31 16:45
Speedup of the Asynchronous Serial Multiplier by Concealing the Idle Phase for Digital Hearing Aids
Masahiro Nagata (Okayama Prefectural Univ.), Masafumi Kondo, Isao Kayono (Kawasaki Univ. of Medical Welfare), Tomoyuki Yokogawa, Kazutami Arimoto, Yoichiro Sato (Okayama Prefectural Univ.) CAS2019-22 VLD2019-28 SIP2019-38 MSS2019-22
Abstract (in Japanese) (See Japanese page) 
(in English) Recently, digital hearing aids with DSP have spread through, but their battery life has remained for only a few days. For this problem, we applied an asynchronous circuit-based control method to a serial multiplier using only a single full adder (FA) and realized low power consumption and small area Multiply and ACcumulator (MAC). However, the calculation time increases due to the idle phase required for controlling asynchronous circuits, and it is difficult to obtain sufficient frequency characteristics when applied to filter circuits. Therefore, in this study, we propose a method of concealing the idle phase and reduce the calculation time by arranging an additional FA in parallel and complementarity controlling the two FAs. Then, we design the MAC based on the proposed method, confirm its operation by simulation and its effectiveness about power consumption.
Keyword (in Japanese) (See Japanese page) 
(in English) Digital Hearing Aid / Dual-rail / Asynchronous Circuit / Serial Multiplier / / / /  
Reference Info. IEICE Tech. Rep., vol. 119, no. 153, CAS2019-22, pp. 99-104, July 2019.
Paper # CAS2019-22 
Date of Issue 2019-07-23 (CAS, VLD, SIP, MSS) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
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Download PDF CAS2019-22 VLD2019-28 SIP2019-38 MSS2019-22

Conference Information
Committee MSS CAS SIP VLD  
Conference Date 2019-07-30 - 2019-07-31 
Place (in Japanese) (See Japanese page) 
Place (in English) Iwate Univ. 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To CAS 
Conference Code 2019-07-MSS-CAS-SIP-VLD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Speedup of the Asynchronous Serial Multiplier by Concealing the Idle Phase for Digital Hearing Aids 
Sub Title (in English)  
Keyword(1) Digital Hearing Aid  
Keyword(2) Dual-rail  
Keyword(3) Asynchronous Circuit  
Keyword(4) Serial Multiplier  
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1st Author's Name Masahiro Nagata  
1st Author's Affiliation Okayama Prefectural University (Okayama Prefectural Univ.)
2nd Author's Name Masafumi Kondo  
2nd Author's Affiliation Kawasaki University of Medical Welfare (Kawasaki Univ. of Medical Welfare)
3rd Author's Name Isao Kayono  
3rd Author's Affiliation Kawasaki University of Medical Welfare (Kawasaki Univ. of Medical Welfare)
4th Author's Name Tomoyuki Yokogawa  
4th Author's Affiliation Okayama Prefectural University (Okayama Prefectural Univ.)
5th Author's Name Kazutami Arimoto  
5th Author's Affiliation Okayama Prefectural University (Okayama Prefectural Univ.)
6th Author's Name Yoichiro Sato  
6th Author's Affiliation Okayama Prefectural University (Okayama Prefectural Univ.)
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Speaker Author-1 
Date Time 2019-07-31 16:45:00 
Presentation Time 25 minutes 
Registration for CAS 
Paper # CAS2019-22, VLD2019-28, SIP2019-38, MSS2019-22 
Volume (vol) vol.119 
Number (no) no.153(CAS), no.154(VLD), no.155(SIP), no.156(MSS) 
Page pp.99-104 
#Pages
Date of Issue 2019-07-23 (CAS, VLD, SIP, MSS) 


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