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Paper Abstract and Keywords
Presentation 2019-07-26 11:25
Inter-Node Direct Memory Access Performance with Distributed Switch for Full-Mesh Connection Between Accelerators with Optical Hub
Kenji Mizutani, Hiroshi Yamaguchi, Yutaka Urino (PETRA) CPSY2019-32 DC2019-32
Abstract (in Japanese) (See Japanese page) 
(in English) In order to improve communication performance for paralle processing, we have proposed an optical hub that connects nodes by full-mesh network . In this paper, we introduce the distributed switch with a simple circuit switching mechanism to construct an optical hub. By using this distributed switch, in the communication process of the sending node send, we achieved the low latency result (0.34 usec) in one point-to-point memory-to-memory communication.
Keyword (in Japanese) (See Japanese page) 
(in English) parallel distributed processing / communication / full mesh connection / accelerator / tight coupling / point to point communication / delay /  
Reference Info. IEICE Tech. Rep., vol. 119, no. 147, CPSY2019-32, pp. 171-176, July 2019.
Paper # CPSY2019-32 
Date of Issue 2019-07-17 (CPSY, DC) 
ISSN Online edition: ISSN 2432-6380
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All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CPSY2019-32 DC2019-32

Conference Information
Committee CPSY DC IPSJ-ARC  
Conference Date 2019-07-24 - 2019-07-26 
Place (in Japanese) (See Japanese page) 
Place (in English) Kitami Civic Hall 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Parallel, Distributed and Cooperative Processing Systems and Dependable Computing 
Paper Information
Registration To CPSY 
Conference Code 2019-07-CPSY-DC-ARC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Inter-Node Direct Memory Access Performance with Distributed Switch for Full-Mesh Connection Between Accelerators with Optical Hub 
Sub Title (in English)  
Keyword(1) parallel distributed processing  
Keyword(2) communication  
Keyword(3) full mesh connection  
Keyword(4) accelerator  
Keyword(5) tight coupling  
Keyword(6) point to point communication  
Keyword(7) delay  
Keyword(8)  
1st Author's Name Kenji Mizutani  
1st Author's Affiliation Photonics Electronics Technology Research Association (PETRA)
2nd Author's Name Hiroshi Yamaguchi  
2nd Author's Affiliation Photonics Electronics Technology Research Association (PETRA)
3rd Author's Name Yutaka Urino  
3rd Author's Affiliation Photonics Electronics Technology Research Association (PETRA)
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Speaker Author-1 
Date Time 2019-07-26 11:25:00 
Presentation Time 30 minutes 
Registration for CPSY 
Paper # CPSY2019-32, DC2019-32 
Volume (vol) vol.119 
Number (no) no.147(CPSY), no.148(DC) 
Page pp.171-176 
#Pages
Date of Issue 2019-07-17 (CPSY, DC) 


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