Paper Abstract and Keywords |
Presentation |
2019-07-24 15:25
Garbled Circuit by three valued logics by Bochvar Shunsuke Hayashi, Taroh Sasaki, Athushi Fujioka (Kanagawa Univ.) ISEC2019-56 SITE2019-50 BioX2019-48 HWS2019-51 ICSS2019-54 EMM2019-59 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
This pepar considers the number of ciphertexts in garbled circuits on the three-valued logics. Lindell et al. proposed four garbling schemes for circuits based on the three-valued logics by Kleene. However, they did not adopt the other three-valued logics, e.g, the logics by Bochvar. We apply the four schemes to circuits on three-valued logics by Bochvar. We also consider in which three-valued logic the number of ciphertexts is reduced. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
three-valued logic by Bochva / garbled circuit / the number of ciphertexts / / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 119, no. 140, ISEC2019-56, pp. 363-368, July 2019. |
Paper # |
ISEC2019-56 |
Date of Issue |
2019-07-16 (ISEC, SITE, BioX, HWS, ICSS, EMM) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
Download PDF |
ISEC2019-56 SITE2019-50 BioX2019-48 HWS2019-51 ICSS2019-54 EMM2019-59 |
Conference Information |
Committee |
ISEC SITE ICSS EMM HWS BioX IPSJ-CSEC IPSJ-SPT |
Conference Date |
2019-07-23 - 2019-07-24 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Kochi University of Technology |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Security, etc. |
Paper Information |
Registration To |
ISEC |
Conference Code |
2019-07-ISEC-SITE-ICSS-EMM-HWS-BioX-CSEC-SPT |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Garbled Circuit by three valued logics by Bochvar |
Sub Title (in English) |
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three-valued logic by Bochva |
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garbled circuit |
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the number of ciphertexts |
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1st Author's Name |
Shunsuke Hayashi |
1st Author's Affiliation |
Kanagawa University (Kanagawa Univ.) |
2nd Author's Name |
Taroh Sasaki |
2nd Author's Affiliation |
Kanagawa University (Kanagawa Univ.) |
3rd Author's Name |
Athushi Fujioka |
3rd Author's Affiliation |
Kanagawa University (Kanagawa Univ.) |
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Speaker |
Author-1 |
Date Time |
2019-07-24 15:25:00 |
Presentation Time |
25 minutes |
Registration for |
ISEC |
Paper # |
ISEC2019-56, SITE2019-50, BioX2019-48, HWS2019-51, ICSS2019-54, EMM2019-59 |
Volume (vol) |
vol.119 |
Number (no) |
no.140(ISEC), no.141(SITE), no.142(BioX), no.143(HWS), no.144(ICSS), no.145(EMM) |
Page |
pp.363-368 |
#Pages |
6 |
Date of Issue |
2019-07-16 (ISEC, SITE, BioX, HWS, ICSS, EMM) |
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