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Paper Abstract and Keywords
Presentation 2019-04-19 09:30
Design and demonstration of an adiabatic-quantum-flux-parametron field-programmable gate array using Josephson-CMOS hybrid memories
Yukihiro Okuma, Naoki Takeuchi, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama Nat. Univ.) SCE2019-1 Link to ES Tech. Rep. Archives: SCE2019-1
Abstract (in Japanese) (See Japanese page) 
(in English) Adiabatic quantum-flux-parametron (AQFP) logic is a promising technology for future energy-efficient high-performance information processing systems. Its static power is zero because of ac flux bias, and its dynamic power is considerably reduced thanks to the adiabatic switching of the junctions. The lack of high-density memories in the AQFP logic, however, makes it challenging to realize large-scale information processing systems with the use of pure AQFP circuits. We have been developing a Josephson-CMOS hybrid memory to overcome the memory bottleneck in AQFP digital systems. By utilizing the high sensitivity of the AQFP gate, the output current from CMOS memories can be significantly decreased resulting in the reduction of the power consumption. In this study, we designed and fabricated a low-power area-efficient AQFP-CMOS hybrid field-programmable gate array (FPGA), where a CMOS memory is utilized as a rewritable read-only memory to control the AQFP circuits. The AQFP circuit for the AQFP-CMOS hybrid FPGA is composed of logic blocks, switch blocks and connection blocks, which are clocked by four-phase excitation currents. The AQFP-CMOS hybrid FPGA is fabricated by using the AIST 10 kA/cm2 Nb high-speed standard process and the Rhom 0.18 μm CMOS process. The area and power consumption of the two-by-two logic-cell system are estimated to be about 6.56 mm2 and 12.4 nW at 5 GHz operations, respectively. We demonstrated the operation of the AQFP-CMOS hybrid FPGA at low speed by combining the AQFP logic and the CMOS memory.
Keyword (in Japanese) (See Japanese page) 
(in English) AQFP / FPGA / Josephson-CMOS hybrid memory / superconducting integrated circuit / QFP / / /  
Reference Info. IEICE Tech. Rep., vol. 119, no. 10, SCE2019-1, pp. 1-6, April 2019.
Paper # SCE2019-1 
Date of Issue 2019-04-12 (SCE) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
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All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF SCE2019-1 Link to ES Tech. Rep. Archives: SCE2019-1

Conference Information
Committee SCE  
Conference Date 2019-04-19 - 2019-04-19 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To SCE 
Conference Code 2019-04-SCE 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Design and demonstration of an adiabatic-quantum-flux-parametron field-programmable gate array using Josephson-CMOS hybrid memories 
Sub Title (in English)  
Keyword(1) AQFP  
Keyword(2) FPGA  
Keyword(3) Josephson-CMOS hybrid memory  
Keyword(4) superconducting integrated circuit  
Keyword(5) QFP  
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1st Author's Name Yukihiro Okuma  
1st Author's Affiliation Yokohama National University (Yokohama Nat. Univ.)
2nd Author's Name Naoki Takeuchi  
2nd Author's Affiliation Yokohama National University (Yokohama Nat. Univ.)
3rd Author's Name Yuki Yamanashi  
3rd Author's Affiliation Yokohama National University (Yokohama Nat. Univ.)
4th Author's Name Nobuyuki Yoshikawa  
4th Author's Affiliation Yokohama National University (Yokohama Nat. Univ.)
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Speaker Author-4 
Date Time 2019-04-19 09:30:00 
Presentation Time 25 minutes 
Registration for SCE 
Paper # SCE2019-1 
Volume (vol) vol.119 
Number (no) no.10 
Page pp.1-6 
#Pages
Date of Issue 2019-04-12 (SCE) 


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