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Paper Abstract and Keywords
Presentation 2019-04-12 14:20
Design of Unified Hardware Architecture for GF-Arithmetic Authenticated Encryption Schemes
Shotaro Sawataishi, Rei Ueno, Naofumi Homma (Tohoku Univ.) HWS2019-3
Abstract (in Japanese) (See Japanese page) 
(in English) This paper presents an efficient unified hardware for several authenticated encryption schemes based on Galois-field (GF) arithmetic. Some of major authenticated encryption schemes including AES-GCM employ AES and GF arithmetic operations for symmetric encryption and tag generation, respectively. However, it has been difficult to design a hardware efficiently unifying such authenticated encryption schemes because conventional hardware architectures for authenticated encryption embed mode operations (i.e., peripherals) into the datapath and/or realize them in hardware. In this paper, we design an efficient unified hardware for authenticated encryption schemes consisting of AES and GF arithmetic operations. We propose a peripheral-datapath-reconfigurable AES encryption/decryption core and a unified GF accumulator, which makes it possible to efficiently perform a set of authenticated encryption schemes. In particular, we focus on major and state-of-the-art authenticated encryption schemes including AES-GCM and proposals to CAESAR competition. The usefulness of the proposed hardware is validated through performance comparison with straightforward parallel implementation where four authenticated encryption schemes are independently implemented without any unification.
Keyword (in Japanese) (See Japanese page) 
(in English) Authenticated encryption / Message authentication code / Galois-field arithmetic / AES / Hardware implementation / / /  
Reference Info. IEICE Tech. Rep., vol. 119, no. 2, HWS2019-3, pp. 13-18, April 2019.
Paper # HWS2019-3 
Date of Issue 2019-04-05 (HWS) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
Copyright
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reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee HWS  
Conference Date 2019-04-12 - 2019-04-12 
Place (in Japanese) (See Japanese page) 
Place (in English) Tohoku University 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Hardware Security, etc. 
Paper Information
Registration To HWS 
Conference Code 2019-04-HWS 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Design of Unified Hardware Architecture for GF-Arithmetic Authenticated Encryption Schemes 
Sub Title (in English)  
Keyword(1) Authenticated encryption  
Keyword(2) Message authentication code  
Keyword(3) Galois-field arithmetic  
Keyword(4) AES  
Keyword(5) Hardware implementation  
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1st Author's Name Shotaro Sawataishi  
1st Author's Affiliation Tohoku University (Tohoku Univ.)
2nd Author's Name Rei Ueno  
2nd Author's Affiliation Tohoku University (Tohoku Univ.)
3rd Author's Name Naofumi Homma  
3rd Author's Affiliation Tohoku University (Tohoku Univ.)
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Speaker
Date Time 2019-04-12 14:20:00 
Presentation Time 25 
Registration for HWS 
Paper # IEICE-HWS2019-3 
Volume (vol) IEICE-119 
Number (no) no.2 
Page pp.13-18 
#Pages IEICE-6 
Date of Issue IEICE-HWS-2019-04-05 


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