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| Presentation | 2019-02-27 14:30 A Compaction Method for Test Sensitization State in Controllers Yuki Ikegaya, Yuta Ishiyama, Toshinori Hosokawa, Hiroshi Yamazaki (Nihon Univ.)  DC2018-80 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | One of the challenges on VLSI testing is to reduce the area overhead of design-for-testability and to increase the fault efficiency. To solve the challenge, we focus on a design-for-testability method using partial scan design and controller augmentation to execute the operations of easily testable functional time expansion models. In this method, when test operation control-status signal sequences to execute easily testable functional time expansion models are given, the state transitions on invalid states in controllers are designed such that the sequences are supplied to control signals of data-paths. When the total sum of the lengths for test operation control-status signal sequences is large, it is required to increase the bit width of a state register in controllers to augment the number of invalid states. In this paper, we propose a compaction method of test operation control-state signal sequences to reduce the area overhead of controllers. Experimental results for high-level benchmark circuits show that our proposed method reduces the area overhead by 27 to 34% compared with that without the compaction of test operation control-state signal sequences. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | register transfer level / easily testable functional time expansion models / controller augmentation / test sensitization states / test operation control-status signal sequences / functional operation control-status signal sequences / / | |
| Reference Info. | IEICE Tech. Rep., vol. 118, no. 456, DC2018-80, pp. 55-60, Feb. 2019. | |
| Paper # | DC2018-80 | |
| Date of Issue | 2019-02-20 (DC) | |
| ISSN | Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | DC2018-80 |
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| Conference Information | |
| Committee | DC |
| Conference Date | 2019-02-27 - 2019-02-27 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kikai-Shinko-Kaikan Bldg. |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | VLSI Design and Test, etc. |
| Paper Information | |
| Registration To | DC |
| Conference Code | 2019-02-DC |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Compaction Method for Test Sensitization State in Controllers |
| Sub Title (in English) | |
| Keyword(1) | register transfer level |
| Keyword(2) | easily testable functional time expansion models |
| Keyword(3) | controller augmentation |
| Keyword(4) | test sensitization states |
| Keyword(5) | test operation control-status signal sequences |
| Keyword(6) | functional operation control-status signal sequences |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Yuki Ikegaya |
| 1st Author's Affiliation | Nihon University (Nihon Univ.) |
| 2nd Author's Name | Yuta Ishiyama |
| 2nd Author's Affiliation | Nihon University (Nihon Univ.) |
| 3rd Author's Name | Toshinori Hosokawa |
| 3rd Author's Affiliation | Nihon University (Nihon Univ.) |
| 4th Author's Name | Hiroshi Yamazaki |
| 4th Author's Affiliation | Nihon University (Nihon Univ.) |
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| Speaker | Author-1 |
| Date Time | 2019-02-27 14:30:00 |
| Presentation Time | 25 minutes |
| Registration for | DC |
| Paper # | DC2018-80 |
| Volume (vol) | vol.118 |
| Number (no) | no.456 |
| Page | pp.55-60 |
| #Pages | 6 |
| Date of Issue | 2019-02-20 (DC) |
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