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Paper Abstract and Keywords
Presentation 2018-11-09 14:20
[Invited Talk] Device Simulation of Field-Effect Transistor Using Ferroelectric Negative Capacitance
Junichi Hattori, Tsutomu Ikegami, Koichi Fukuda, Hiroyuki Ota, Shinji Migita, Hidehiro Asai (AIST) SDM2018-74 Link to ES Tech. Rep. Archives: SDM2018-74
Abstract (in Japanese) (See Japanese page) 
(in English) We consider the method to simulate negative-capacitance field-effect transistors (NC FETs) harnessing negative capacitance of a ferroelectric film used as a gate insulator and propose a method completely applicable to technology computer-aided design device simulators. In this method, the behavior of the polarization in ferroelectrics is described by a Landau-Khalatnikov equation and it can be solved simultaneously with the other equations governing NC FETs such as the Poisson equation and electron and hole current continuity equations. We simulate NC FETs using the method and show the possibility of their expected steep-slope switching. Also, owing to its high extensibility, the proposed method enables the device simulators to take into account a factor related to the domain structure formation in the polarization field of ferroelectrics.
Keyword (in Japanese) (See Japanese page) 
(in English) ferroelectrics / negative capacitance / field-effect transistors / device simulation / TCAD / / /  
Reference Info. IEICE Tech. Rep., vol. 118, no. 291, SDM2018-74, pp. 47-52, Nov. 2018.
Paper # SDM2018-74 
Date of Issue 2018-11-01 (SDM) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
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All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF SDM2018-74 Link to ES Tech. Rep. Archives: SDM2018-74

Conference Information
Committee SDM  
Conference Date 2018-11-08 - 2018-11-09 
Place (in Japanese) (See Japanese page) 
Place (in English) Kikai-Shinko-Kaikan Bldg. 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Process, Device, Circuit simulation, etc. 
Paper Information
Registration To SDM 
Conference Code 2018-11-SDM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Device Simulation of Field-Effect Transistor Using Ferroelectric Negative Capacitance 
Sub Title (in English)  
Keyword(1) ferroelectrics  
Keyword(2) negative capacitance  
Keyword(3) field-effect transistors  
Keyword(4) device simulation  
Keyword(5) TCAD  
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1st Author's Name Junichi Hattori  
1st Author's Affiliation AIST (AIST)
2nd Author's Name Tsutomu Ikegami  
2nd Author's Affiliation AIST (AIST)
3rd Author's Name Koichi Fukuda  
3rd Author's Affiliation AIST (AIST)
4th Author's Name Hiroyuki Ota  
4th Author's Affiliation AIST (AIST)
5th Author's Name Shinji Migita  
5th Author's Affiliation AIST (AIST)
6th Author's Name Hidehiro Asai  
6th Author's Affiliation AIST (AIST)
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Speaker Author-1 
Date Time 2018-11-09 14:20:00 
Presentation Time 60 minutes 
Registration for SDM 
Paper # SDM2018-74 
Volume (vol) vol.118 
Number (no) no.291 
Page pp.47-52 
#Pages
Date of Issue 2018-11-01 (SDM) 


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