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| Presentation | 2018-07-26 15:25 A Study on Systematic Insertion of Hardware Trojan Based on Path Delay Akira Ito, Rei Ueno, Naofumi Homma, Takafumi Aoki (Tohoku Univ.)  ISEC2018-44 SITE2018-36 HWS2018-41 ICSS2018-47 EMM2018-43 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | This paper presents a non-reversible and analytical method for inserting a path delay hardware Trojan (PDHT). The conventional PDHT-insertion method can be detected by reversing the insertion algorithm. In addition, because there was no analytical method, it employs a meta heuristics. This paper first shows that there is a non-trivial relation between PDHT-detectability and dynamic hazard, and then proposes a non-reversible PDHT-insertion method according to the relation. The proposed PDHT is evaluated through an experimental detection using Monte-Carlo test. Consequently, we confirm that the proposed PDHT insertion method can be a practical threat for public-key cryptographic hardware including multipliers. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Hardware Trojan / Path delay fault / Parallel multipliers / Public key cryptographic hardware / Bug attack / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 118, no. 153, HWS2018-41, pp. 349-356, July 2018. | |
| Paper # | HWS2018-41 | |
| Date of Issue | 2018-07-18 (ISEC, SITE, HWS, ICSS, EMM) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | ISEC2018-44 SITE2018-36 HWS2018-41 ICSS2018-47 EMM2018-43 |
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| Conference Information | |
| Committee | HWS ISEC SITE ICSS EMM IPSJ-CSEC IPSJ-SPT |
| Conference Date | 2018-07-25 - 2018-07-26 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Sapporo Convention Center |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Security, etc. |
| Paper Information | |
| Registration To | HWS |
| Conference Code | 2018-07-HWS-ISEC-SITE-ICSS-EMM-CSEC-SPT |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Study on Systematic Insertion of Hardware Trojan Based on Path Delay |
| Sub Title (in English) | |
| Keyword(1) | Hardware Trojan |
| Keyword(2) | Path delay fault |
| Keyword(3) | Parallel multipliers |
| Keyword(4) | Public key cryptographic hardware |
| Keyword(5) | Bug attack |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Akira Ito |
| 1st Author's Affiliation | Tohoku University (Tohoku Univ.) |
| 2nd Author's Name | Rei Ueno |
| 2nd Author's Affiliation | Tohoku University (Tohoku Univ.) |
| 3rd Author's Name | Naofumi Homma |
| 3rd Author's Affiliation | Tohoku University (Tohoku Univ.) |
| 4th Author's Name | Takafumi Aoki |
| 4th Author's Affiliation | Tohoku University (Tohoku Univ.) |
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| Speaker | Author-1 |
| Date Time | 2018-07-26 15:25:00 |
| Presentation Time | 25 minutes |
| Registration for | HWS |
| Paper # | ISEC2018-44, SITE2018-36, HWS2018-41, ICSS2018-47, EMM2018-43 |
| Volume (vol) | vol.118 |
| Number (no) | no.151(ISEC), no.152(SITE), no.153(HWS), no.154(ICSS), no.155(EMM) |
| Page | pp.349-356 |
| #Pages | 8 |
| Date of Issue | 2018-07-18 (ISEC, SITE, HWS, ICSS, EMM) |
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