| IEICE Technical Committee Submission System Conference Paper's Information |
Online Proceedings [Sign in] Tech. Rep. Archives |
| Go Top Page | Go Previous | [Japanese] / [English] |
| Paper Abstract and Keywords | ||
| Presentation | 2018-05-25 10:35 Design of an MTJ-Based Multi-Functional Lookup Table Circuit Daisuke Suzuki, Takahiro Oka, Takahiro Hanyu (Tohoku Univ.)  RECONF2018-12 |
|
| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | A multi-functional nonvolatile lookup table (LUT) circuit is described using a magnetic tunnel junction (MTJ) and CMOS hybrid circuit design. By utilizing a data addressing in the LUT circuit, the state of the MTJ device is serially read and written, which results in the shift-register (SR) function with minimum write access. Moreover, since the decoder for the LUT function can also be used for the data addressing, the hardware overhead is quite small. In fact, the effective area of the proposed 6-input LUT circuit and power consumption for the SR function are reduced by 53% and 88% compared to those of the SRAM-based implementation. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Field-Programmable Gate Array (FPGA) / Magnetic Tunnel Junction (MTJ) Device / Lookup Table (LUT) Circuit / / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 118, no. 63, RECONF2018-12, pp. 59-64, May 2018. | |
| Paper # | RECONF2018-12 | |
| Date of Issue | 2018-05-17 (RECONF) | |
| ISSN | Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Notes on Review | This article is a technical report without peer review, and its polished version will be published elsewhere. | |
| Download PDF | RECONF2018-12 |
|
| Conference Information | |
| Committee | RECONF |
| Conference Date | 2018-05-24 - 2018-05-25 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | GATE CITY OHSAKI |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Deep Learning, Reconfigurable Systems, etc. |
| Paper Information | |
| Registration To | RECONF |
| Conference Code | 2018-05-RECONF |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Design of an MTJ-Based Multi-Functional Lookup Table Circuit |
| Sub Title (in English) | |
| Keyword(1) | Field-Programmable Gate Array (FPGA) |
| Keyword(2) | Magnetic Tunnel Junction (MTJ) Device |
| Keyword(3) | Lookup Table (LUT) Circuit |
| Keyword(4) | |
| Keyword(5) | |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Daisuke Suzuki |
| 1st Author's Affiliation | Tohoku University (Tohoku Univ.) |
| 2nd Author's Name | Takahiro Oka |
| 2nd Author's Affiliation | Tohoku University (Tohoku Univ.) |
| 3rd Author's Name | Takahiro Hanyu |
| 3rd Author's Affiliation | Tohoku University (Tohoku Univ.) |
| 4th Author's Name | |
| 4th Author's Affiliation | () |
| 5th Author's Name | |
| 5th Author's Affiliation | () |
| 6th Author's Name | |
| 6th Author's Affiliation | () |
| 7th Author's Name | |
| 7th Author's Affiliation | () |
| 8th Author's Name | |
| 8th Author's Affiliation | () |
| 9th Author's Name | |
| 9th Author's Affiliation | () |
| 10th Author's Name | |
| 10th Author's Affiliation | () |
| 11th Author's Name | |
| 11th Author's Affiliation | () |
| 12th Author's Name | |
| 12th Author's Affiliation | () |
| 13th Author's Name | |
| 13th Author's Affiliation | () |
| 14th Author's Name | |
| 14th Author's Affiliation | () |
| 15th Author's Name | |
| 15th Author's Affiliation | () |
| 16th Author's Name | |
| 16th Author's Affiliation | () |
| 17th Author's Name | |
| 17th Author's Affiliation | () |
| 18th Author's Name | |
| 18th Author's Affiliation | () |
| Speaker | Author-1 |
| Date Time | 2018-05-25 10:35:00 |
| Presentation Time | 25 minutes |
| Registration for | RECONF |
| Paper # | RECONF2018-12 |
| Volume (vol) | vol.118 |
| Number (no) | no.63 |
| Page | pp.59-64 |
| #Pages | 6 |
| Date of Issue | 2018-05-17 (RECONF) |
[Return to Top Page]