Paper Abstract and Keywords |
Presentation |
2018-01-18 15:45
Study on Deployment of a Computer Algebra System for Generating Random Test Patterns for Combinational Circuits Tsutomu Inamoto, Yoshinobu Higami (Ehime Univ.) MSS2017-57 SS2017-44 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
In this study, the authors display an attempt of deploying a computer algebra system to improve the fault detection rate of test pattern sets
for fault detection of combinational circuits.
Partial derivatives are brought by representing logic expressions for external output lines of combinational circuits as polynomial
expressions comprised of variables each of which corresponds to an external input line of circuits, and then by differentiating output
polynomial expressions by input variables.
The author speculates such partial derivatives hold some information useful for fault detection, because they correspond to boolean
differences.
According to this speculation, the number of variables contained in the partial derivative is picked up as a characteristics of that
derivative.
In computational results, the relation between that characteristics and the fault detection rate is investigated. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
combinational circuit / stuck-at fault / fault detection / polynomial / computer algebra system / / / |
Reference Info. |
IEICE Tech. Rep., vol. 117, no. 380, MSS2017-57, pp. 59-64, Jan. 2018. |
Paper # |
MSS2017-57 |
Date of Issue |
2018-01-11 (MSS, SS) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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MSS2017-57 SS2017-44 |
Conference Information |
Committee |
SS MSS |
Conference Date |
2018-01-18 - 2018-01-19 |
Place (in Japanese) |
(See Japanese page) |
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(See Japanese page) |
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Paper Information |
Registration To |
MSS |
Conference Code |
2018-01-SS-MSS |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Study on Deployment of a Computer Algebra System for Generating Random Test Patterns for Combinational Circuits |
Sub Title (in English) |
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Keyword(1) |
combinational circuit |
Keyword(2) |
stuck-at fault |
Keyword(3) |
fault detection |
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polynomial |
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computer algebra system |
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1st Author's Name |
Tsutomu Inamoto |
1st Author's Affiliation |
Ehime University (Ehime Univ.) |
2nd Author's Name |
Yoshinobu Higami |
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Ehime University (Ehime Univ.) |
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Speaker |
Author-1 |
Date Time |
2018-01-18 15:45:00 |
Presentation Time |
25 minutes |
Registration for |
MSS |
Paper # |
MSS2017-57, SS2017-44 |
Volume (vol) |
vol.117 |
Number (no) |
no.380(MSS), no.381(SS) |
Page |
pp.59-64 |
#Pages |
6 |
Date of Issue |
2018-01-11 (MSS, SS) |
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