Paper Abstract and Keywords |
Presentation |
2017-11-09 15:40
[Invited Talk]
GaN MOS capacitance simulation considering deep traps Koichi Fukuda, Hidehiro Asai, Junichi Hattori, Mitsuaki Shimizu (AIST), Tamotsu Hashizume (Hokkaido Univ.) SDM2017-66 Link to ES Tech. Rep. Archives: SDM2017-66 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
Transient mode device simulation is applied to obtain capacitances of GaN MOS capacitors including deep level traps, and is successful to simulate various unideal C-V curves arising from the traps. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
GaN / MOS / Device Simulation / trap / capacitance / / / |
Reference Info. |
IEICE Tech. Rep., vol. 117, no. 290, SDM2017-66, pp. 27-32, Nov. 2017. |
Paper # |
SDM2017-66 |
Date of Issue |
2017-11-02 (SDM) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
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SDM2017-66 Link to ES Tech. Rep. Archives: SDM2017-66 |
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