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| Presentation | 2017-11-07 09:50 A PUF Based on the Instantaneous Response of Ring Oscillator Determined by the Convergence Time of Bistable Ring Oscillator Circuit Yuki Tanaka, Song Bian, Masayuki Hiromoto, Takashi Sato (Kyoto Univ.)  VLD2017-40 DC2017-46 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | Studies on physical unclonable function (PUF) have been actively conducted as one of the countermeasures against counterfeited chips. PUF is a circuit that serves as a function which returns a response corresponding to a given challenge. In addition to uniqueness and reproducibility, resistance against machine learning attacks has been emphasized as an important metric to evaluate PUF. Most of existing PUFs are vulnerable to the machine learning attacks such as support vector machine (SVM). This paper proposes a PUF architecture that improves resistance against machine learning attacks. By utilizing the fact that the convergence time of a bistable ring circuit changes strongly nonlinearly with respect to threshold voltage variation, the proposed PUF generates response as an instantaneous value of a ring oscillator at a convergence time of the bistable ring running in parallel. Resistance against machine learning attacks as well as randomness, diffuseness, uniqueness, and reproducibility of the proposed PUF have been validated through SPICE simulations. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | PUF / Hardware Security / Ring Oscillator / Machine Learning / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 117, no. 273, VLD2017-40, pp. 79-84, Nov. 2017. | |
| Paper # | VLD2017-40 | |
| Date of Issue | 2017-10-30 (VLD, DC) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | VLD2017-40 DC2017-46 |
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| Conference Information | |
| Committee | VLD DC CPSY RECONF CPM ICD IE IPSJ-SLDM |
| Conference Date | 2017-11-06 - 2017-11-08 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kumamoto-Kenminkouryukan Parea |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Gaia 2017 -New Field of VLSI Design- |
| Paper Information | |
| Registration To | VLD |
| Conference Code | 2017-11-VLD-DC-CPSY-RECONF-CPM-ICD-IE-SLDM-EMB-ARC |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A PUF Based on the Instantaneous Response of Ring Oscillator Determined by the Convergence Time of Bistable Ring Oscillator Circuit |
| Sub Title (in English) | |
| Keyword(1) | PUF |
| Keyword(2) | Hardware Security |
| Keyword(3) | Ring Oscillator |
| Keyword(4) | Machine Learning |
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| 1st Author's Name | Yuki Tanaka |
| 1st Author's Affiliation | Kyoto University (Kyoto Univ.) |
| 2nd Author's Name | Song Bian |
| 2nd Author's Affiliation | Kyoto University (Kyoto Univ.) |
| 3rd Author's Name | Masayuki Hiromoto |
| 3rd Author's Affiliation | Kyoto University (Kyoto Univ.) |
| 4th Author's Name | Takashi Sato |
| 4th Author's Affiliation | Kyoto University (Kyoto Univ.) |
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| Speaker | Author-1 |
| Date Time | 2017-11-07 09:50:00 |
| Presentation Time | 25 minutes |
| Registration for | VLD |
| Paper # | VLD2017-40, DC2017-46 |
| Volume (vol) | vol.117 |
| Number (no) | no.273(VLD), no.274(DC) |
| Page | pp.79-84 |
| #Pages | 6 |
| Date of Issue | 2017-10-30 (VLD, DC) |
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