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Paper Abstract and Keywords
Presentation 2017-07-28 17:30
Consideration on ARM Machine Code Frontend for LLVM-based Binary Code Optimization
Kohta Shigenobu, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota (Utsunomiya Univ.) CPSY2017-39
Abstract (in Japanese) (See Japanese page) 
(in English) Recently, mobile devices and embedded devices equipped with processing devices such as multicore processor and GPU are becoming popular. In order to make full use of these devices, it is necessary to optimize the program according to the environment of the device. We are developing a LLVM based system that automatically optimizes ARM binary code according to the environment of the device. Optimization processing of LLVM is performed for LLVM IR. Therefore, ARM machine code front end which translates ARM machine code into LLVM IR is important. For later optimization, the translated LLVM IR needs to be an expression that can be optimized but it is not self explanatory. In this paper, we considerate translation method that generate IR equivalent to IR generated from source code and show the result of applying the method.
Keyword (in Japanese) (See Japanese page) 
(in English) ARM machine code / LLVM / binary code optimization / / / / /  
Reference Info. IEICE Tech. Rep., vol. 117, no. 153, CPSY2017-39, pp. 229-234, July 2017.
Paper # CPSY2017-39 
Date of Issue 2017-07-19 (CPSY) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
Copyright
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reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CPSY2017-39

Conference Information
Committee CPSY DC IPSJ-ARC  
Conference Date 2017-07-26 - 2017-07-28 
Place (in Japanese) (See Japanese page) 
Place (in English) Akita Atorion-Building (Akita) 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Parallel, Distributed and Cooperative Processing 
Paper Information
Registration To CPSY 
Conference Code 2017-07-CPSY-DC-ARC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Consideration on ARM Machine Code Frontend for LLVM-based Binary Code Optimization 
Sub Title (in English)  
Keyword(1) ARM machine code  
Keyword(2) LLVM  
Keyword(3) binary code optimization  
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1st Author's Name Kohta Shigenobu  
1st Author's Affiliation Utsunomiya University (Utsunomiya Univ.)
2nd Author's Name Kanemitsu Ootsu  
2nd Author's Affiliation Utsunomiya University (Utsunomiya Univ.)
3rd Author's Name Takeshi Ohkawa  
3rd Author's Affiliation Utsunomiya University (Utsunomiya Univ.)
4th Author's Name Takashi Yokota  
4th Author's Affiliation Utsunomiya University (Utsunomiya Univ.)
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Speaker
Date Time 2017-07-28 17:30:00 
Presentation Time 30 
Registration for CPSY 
Paper # IEICE-CPSY2017-39 
Volume (vol) IEICE-117 
Number (no) no.153 
Page pp.229-234 
#Pages IEICE-6 
Date of Issue IEICE-CPSY-2017-07-19 


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