IEICE Technical Committee Submission System
Conference Paper's Information
Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top Page Go Previous   [Japanese] / [English] 

Paper Abstract and Keywords
Presentation 2017-04-20 14:55
[Invited Lecture] First demonstration of FinFET Split-Gate MONOS for High-Speed and Highly-Reliable Embedded Flash in 16/14nm-node and beyond
Shibun Tsuda, Yoshiyuki Kawashima, Kenichiro Sonoda, Atsushi Yoshitomi, Tatsuyoshi Mihara, Shunichi Narumi, Masao Inoue, Seiji Muranaka, Takahiro Maruyama, Tomohiro Yamashita, Yasuo Yamaguchi (Renesas Electronics), Digh Hisamoto (Hitachi) ICD2017-7 Link to ES Tech. Rep. Archives: ICD2017-7
Abstract (in Japanese) (See Japanese page) 
(in English) FinFET split-gate metal-oxide nitride oxide silicon (SG-MONOS) Flash memories have been fabricated and operated for the first time. Excellent subthreshold characteristics and small threshold-voltage variability owing to a Fin-structure are clarified. It is demonstrated that Fin top-corner effects are well suppressed by incremental step pulse programming for source side injection. Highly reliable data retention at 150 ºC after 250K program/erase cycles is confirmed for advanced automotive system applications.
Keyword (in Japanese) (See Japanese page) 
(in English) embedded Flash memory / split gate cell / MONOS / FinFET / / / /  
Reference Info. IEICE Tech. Rep., vol. 117, no. 9, ICD2017-7, pp. 35-38, April 2017.
Paper # ICD2017-7 
Date of Issue 2017-04-13 (ICD) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF ICD2017-7 Link to ES Tech. Rep. Archives: ICD2017-7

Conference Information
Committee ICD  
Conference Date 2017-04-20 - 2017-04-21 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To ICD 
Conference Code 2017-04-ICD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) First demonstration of FinFET Split-Gate MONOS for High-Speed and Highly-Reliable Embedded Flash in 16/14nm-node and beyond 
Sub Title (in English)  
Keyword(1) embedded Flash memory  
Keyword(2) split gate cell  
Keyword(3) MONOS  
Keyword(4) FinFET  
Keyword(5)  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Shibun Tsuda  
1st Author's Affiliation Renesas Electronics Corporation (Renesas Electronics)
2nd Author's Name Yoshiyuki Kawashima  
2nd Author's Affiliation Renesas Electronics Corporation (Renesas Electronics)
3rd Author's Name Kenichiro Sonoda  
3rd Author's Affiliation Renesas Electronics Corporation (Renesas Electronics)
4th Author's Name Atsushi Yoshitomi  
4th Author's Affiliation Renesas Electronics Corporation (Renesas Electronics)
5th Author's Name Tatsuyoshi Mihara  
5th Author's Affiliation Renesas Electronics Corporation (Renesas Electronics)
6th Author's Name Shunichi Narumi  
6th Author's Affiliation Renesas Electronics Corporation (Renesas Electronics)
7th Author's Name Masao Inoue  
7th Author's Affiliation Renesas Electronics Corporation (Renesas Electronics)
8th Author's Name Seiji Muranaka  
8th Author's Affiliation Renesas Electronics Corporation (Renesas Electronics)
9th Author's Name Takahiro Maruyama  
9th Author's Affiliation Renesas Electronics Corporation (Renesas Electronics)
10th Author's Name Tomohiro Yamashita  
10th Author's Affiliation Renesas Electronics Corporation (Renesas Electronics)
11th Author's Name Yasuo Yamaguchi  
11th Author's Affiliation Renesas Electronics Corporation (Renesas Electronics)
12th Author's Name Digh Hisamoto  
12th Author's Affiliation Hitachi, Ltd (Hitachi)
13th Author's Name  
13th Author's Affiliation ()
14th Author's Name  
14th Author's Affiliation ()
15th Author's Name  
15th Author's Affiliation ()
16th Author's Name  
16th Author's Affiliation ()
17th Author's Name  
17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
19th Author's Name  
19th Author's Affiliation ()
20th Author's Name  
20th Author's Affiliation ()
Speaker
Date Time 2017-04-20 14:55:00 
Presentation Time 25 
Registration for ICD 
Paper # IEICE-ICD2017-7 
Volume (vol) IEICE-117 
Number (no) no.9 
Page pp.35-38 
#Pages IEICE-4 
Date of Issue IEICE-ICD-2017-04-13 


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan