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Paper Abstract and Keywords
Presentation 2017-03-03 13:50
Architecture of Multiply-Accumulate Operation with Stochastic Iteration
Tatsuyoshi Sugino, Hideyuki Ichihara, Tsuyoshi Iwagaki, Tomoo Inoue (Hiroshima City Univ.) VLD2016-130
Abstract (in Japanese) (See Japanese page) 
(in English) Stochastic computing, which is an approximate computation method with probabilities (called stochastic numbers), draws attention as an alternative method of deterministic computing.
Compared with today's mainstream deterministic computing (or binary computing), SC requires considerably small hardware implementation, so that it can achieve small power consumption, possessing tolerance for its transient faults.
Since today's nanometer-scale logic circuits are vulnerable to errors, such as soft errors caused by neutrons or alpha particles from cosmic rays or package material, SC shows promise in such situations.
In this paper, we discuss a design method of stochastic computing circuits for multiply-accumulate operation in terms of reliability.
From the viewpoint of reliability, we discuss a design of {em purely} stochastic computing circuits for multiply-accumulate operation. A previous SC circuit for multiply-accumulate operation employs many deterministic numbers, such that binary numbers, so that it loses its reliability. We propose a design of purely stochastic computing circuit without such reliability loss. Experimental results show that the proposed design can achieve high reliability without losing its accuracy.
Keyword (in Japanese) (See Japanese page) 
(in English) Stochastic computing / approximate computing / power iteration / recognition / stretcher / inner product / correlation error /  
Reference Info. IEICE Tech. Rep., vol. 116, no. 478, VLD2016-130, pp. 157-162, March 2017.
Paper # VLD2016-130 
Date of Issue 2017-02-22 (VLD) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2016-130

Conference Information
Committee VLD  
Conference Date 2017-03-01 - 2017-03-03 
Place (in Japanese) (See Japanese page) 
Place (in English) Okinawa Seinen Kaikan 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To VLD 
Conference Code 2017-03-VLD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Architecture of Multiply-Accumulate Operation with Stochastic Iteration 
Sub Title (in English)  
Keyword(1) Stochastic computing  
Keyword(2) approximate computing  
Keyword(3) power iteration  
Keyword(4) recognition  
Keyword(5) stretcher  
Keyword(6) inner product  
Keyword(7) correlation error  
1st Author's Name Tatsuyoshi Sugino  
1st Author's Affiliation Hiroshima City University (Hiroshima City Univ.)
2nd Author's Name Hideyuki Ichihara  
2nd Author's Affiliation Hiroshima City University (Hiroshima City Univ.)
3rd Author's Name Tsuyoshi Iwagaki  
3rd Author's Affiliation Hiroshima City University (Hiroshima City Univ.)
4th Author's Name Tomoo Inoue  
4th Author's Affiliation Hiroshima City University (Hiroshima City Univ.)
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Date Time 2017-03-03 13:50:00 
Presentation Time 25 
Registration for VLD 
Paper # IEICE-VLD2016-130 
Volume (vol) IEICE-116 
Number (no) no.478 
Page pp.157-162 
#Pages IEICE-6 
Date of Issue IEICE-VLD-2017-02-22 

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