Paper Abstract and Keywords |
Presentation |
2017-02-24 10:00
Fabrication and evaluation of silicon triple quantum dots with a compact device structure Takafumi Uchida, Atsushi Tsurumaki-Fukuchi, Masashi Arita (IST. Hokkaido Univ.), Akira Fujiwara (NTT BRL), Yasuo Takahashi (IST. Hokkaido Univ.) ED2016-130 SDM2016-147 Link to ES Tech. Rep. Archives: ED2016-130 SDM2016-147 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
Silicon-based multiple quantum-dot with a scalable gate architecture is a promising candidate for quantum information processing. Here, we demonstrate a triple-quantum-dot (TQD) device fabricated by the pattern-dependent oxidation of a silicon nanowire and an additional oxidation of the nanowire through the gaps between three fine gate electrodes attached on the nanowire. This fabrication method is suitable for the integrated multiple quantum dot device because each quantum dot forms just under each fine gate. In addition, we propose and demonstrate a simultaneous gate-voltage sweeping method for a gate-capacitance evaluation of compact TQD devices with reduced gate distances. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
silicon single-electron device / triple quantum dot / / / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 116, no. 471, ED2016-130, pp. 1-6, Feb. 2017. |
Paper # |
ED2016-130 |
Date of Issue |
2017-02-17 (ED, SDM) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
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ED2016-130 SDM2016-147 Link to ES Tech. Rep. Archives: ED2016-130 SDM2016-147 |
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