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Paper Abstract and Keywords
Presentation 2017-01-31 15:25
A 5.92-Mb/mm2 28-nm Pseudo 2-Read/Write Dual-Port SRAM Using Double Pumping Circuitry
Yuichiro Ishii, Makoto Yabuuchi, Yohei Sawada, Masao Morimoto, Yasumasa Tsukamoto (Renesas Electronics), Yuta Yoshida, Ken Shibata, Toshiaki Sano (Renesas System Design), Shinji Tanaka, Koji Nii (Renesas Electronics) EMD2016-86 MR2016-58 SCE2016-64 EID2016-65 ED2016-129 CPM2016-130 SDM2016-129 ICD2016-117 OME2016-98 Link to ES Tech. Rep. Archives: EMD2016-86 MR2016-58 SCE2016-64 EID2016-65 ED2016-129 CPM2016-130 SDM2016-129 ICD2016-117 OME2016-98
Abstract (in Japanese) (See Japanese page) 
(in English) We propose pseudo dual-port (DP) SRAM by using 6T single-port (SP) SRAM bitcell with double pumping circuitry, which enables 2-read/write (2RW) operation within a clock cycle. We designed and implemented a 512-kb pseudo DP SRAM macro based on 28-nm low-power bulk CMOS technology. Our design achieved the bit density of 5.92 Mb/mm2, which is the highest ever reported.
Keyword (in Japanese) (See Japanese page) 
(in English) Pseudo / DP / 2RW / SRAM / 28nm / Double pumping / /  
Reference Info. IEICE Tech. Rep., vol. 116, no. 446, ICD2016-117, pp. 87-92, Jan. 2017.
Paper # ICD2016-117 
Date of Issue 2017-01-23 (EMD, MR, SCE, EID, ED, CPM, SDM, ICD, OME) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
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Download PDF EMD2016-86 MR2016-58 SCE2016-64 EID2016-65 ED2016-129 CPM2016-130 SDM2016-129 ICD2016-117 OME2016-98 Link to ES Tech. Rep. Archives: EMD2016-86 MR2016-58 SCE2016-64 EID2016-65 ED2016-129 CPM2016-130 SDM2016-129 ICD2016-117 OME2016-98

Conference Information
Committee ICD CPM ED EID EMD MRIS OME SCE 
Conference Date 2017-01-30 - 2017-01-31 
Place (in Japanese) (See Japanese page) 
Place (in English) Miyajima-Morino-Yado(Hiroshima) 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Circuit, Device and Engineering Science 
Paper Information
Registration To ICD 
Conference Code 2017-01-ICD-CPM-ED-EID-EMD-MR-OME-SCE-SDM-QIT 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A 5.92-Mb/mm2 28-nm Pseudo 2-Read/Write Dual-Port SRAM Using Double Pumping Circuitry 
Sub Title (in English)  
Keyword(1) Pseudo  
Keyword(2) DP  
Keyword(3) 2RW  
Keyword(4) SRAM  
Keyword(5) 28nm  
Keyword(6) Double pumping  
Keyword(7)  
Keyword(8)  
1st Author's Name Yuichiro Ishii  
1st Author's Affiliation Renesas Electronics Corporation (Renesas Electronics)
2nd Author's Name Makoto Yabuuchi  
2nd Author's Affiliation Renesas Electronics Corporation (Renesas Electronics)
3rd Author's Name Yohei Sawada  
3rd Author's Affiliation Renesas Electronics Corporation (Renesas Electronics)
4th Author's Name Masao Morimoto  
4th Author's Affiliation Renesas Electronics Corporation (Renesas Electronics)
5th Author's Name Yasumasa Tsukamoto  
5th Author's Affiliation Renesas Electronics Corporation (Renesas Electronics)
6th Author's Name Yuta Yoshida  
6th Author's Affiliation Renesas System Design Co., Ltd. (Renesas System Design)
7th Author's Name Ken Shibata  
7th Author's Affiliation Renesas System Design Co., Ltd. (Renesas System Design)
8th Author's Name Toshiaki Sano  
8th Author's Affiliation Renesas System Design Co., Ltd. (Renesas System Design)
9th Author's Name Shinji Tanaka  
9th Author's Affiliation Renesas Electronics Corporation (Renesas Electronics)
10th Author's Name Koji Nii  
10th Author's Affiliation Renesas Electronics Corporation (Renesas Electronics)
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Speaker Author-1 
Date Time 2017-01-31 15:25:00 
Presentation Time 25 minutes 
Registration for ICD 
Paper # EMD2016-86, MR2016-58, SCE2016-64, EID2016-65, ED2016-129, CPM2016-130, SDM2016-129, ICD2016-117, OME2016-98 
Volume (vol) vol.116 
Number (no) no.439(EMD), no.440(MR), no.441(SCE), no.442(EID), no.443(ED), no.444(CPM), no.445(SDM), no.446(ICD), no.447(OME) 
Page pp.87-92 
#Pages
Date of Issue 2017-01-23 (EMD, MR, SCE, EID, ED, CPM, SDM, ICD, OME) 


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