IEICE Technical Committee Submission System
Conference Paper's Information
Online Proceedings
[Sign in]
... (for ESS/CS/ES/ISS)
Tech. Rep. Archives
... (for ES/CS)
 Go Top Page Go Previous   [Japanese] / [English] 

Paper Abstract and Keywords
Presentation 2017-01-24 09:25
Framework for a Hybrid System with a pair of MCU and FPGA
Ryota Suzuki, Nakajo Hironori (TUAT) VLD2016-81 CPSY2016-117 RECONF2016-62
Abstract (in Japanese) (See Japanese page) 
(in English) Recently, FPGAs for mobile use which have low pin count and small packages are commonly available.
Due to limitation of number of LUTs, such FPGAs do not include a processor, but are controlled by external MCU.
In this report, we propose a framework which assist to make such hybrid system.
Keyword (in Japanese) (See Japanese page) 
(in English) FPGA / MCU / Cooperative System / Design Support / / / /  
Reference Info. IEICE Tech. Rep., vol. 116, no. 417, RECONF2016-62, pp. 67-72, Jan. 2017.
Paper # RECONF2016-62 
Date of Issue 2017-01-16 (VLD, CPSY, RECONF) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (No. 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2016-81 CPSY2016-117 RECONF2016-62

Conference Information
Conference Date 2017-01-23 - 2017-01-25 
Place (in Japanese) (See Japanese page) 
Place (in English) Hiyoshi Campus, Keio Univ. 
Topics (in Japanese) (See Japanese page) 
Topics (in English) FPGA Applications, etc 
Paper Information
Registration To RECONF 
Conference Code 2017-01-CPSY-RECONF-VLD-SLDM-ARC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Framework for a Hybrid System with a pair of MCU and FPGA 
Sub Title (in English)  
Keyword(1) FPGA  
Keyword(2) MCU  
Keyword(3) Cooperative System  
Keyword(4) Design Support  
1st Author's Name Ryota Suzuki  
1st Author's Affiliation Tokyo University of Agriculture and Technology (TUAT)
2nd Author's Name Nakajo Hironori  
2nd Author's Affiliation Tokyo University of Agriculture and Technology (TUAT)
3rd Author's Name  
3rd Author's Affiliation ()
4th Author's Name  
4th Author's Affiliation ()
5th Author's Name  
5th Author's Affiliation ()
6th Author's Name  
6th Author's Affiliation ()
7th Author's Name  
7th Author's Affiliation ()
8th Author's Name  
8th Author's Affiliation ()
9th Author's Name  
9th Author's Affiliation ()
10th Author's Name  
10th Author's Affiliation ()
11th Author's Name  
11th Author's Affiliation ()
12th Author's Name  
12th Author's Affiliation ()
13th Author's Name  
13th Author's Affiliation ()
14th Author's Name  
14th Author's Affiliation ()
15th Author's Name  
15th Author's Affiliation ()
16th Author's Name  
16th Author's Affiliation ()
17th Author's Name  
17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
19th Author's Name  
19th Author's Affiliation ()
20th Author's Name  
20th Author's Affiliation ()
Date Time 2017-01-24 09:25:00 
Presentation Time 25 
Registration for RECONF 
Paper # IEICE-VLD2016-81,IEICE-CPSY2016-117,IEICE-RECONF2016-62 
Volume (vol) IEICE-116 
Number (no) no.415(VLD), no.416(CPSY), no.417(RECONF) 
Page pp.67-72 
#Pages IEICE-6 
Date of Issue IEICE-VLD-2017-01-16,IEICE-CPSY-2017-01-16,IEICE-RECONF-2017-01-16 

[Return to Top Page]

[Return to IEICE Web Page]

The Institute of Electronics, Information and Communication Engineers (IEICE), Japan