Paper Abstract and Keywords |
Presentation |
2016-12-15 15:30
[Poster Presentation]
Analysis of Current Source Transition Timing and Output Current for Glitch Reduction of Current-Steering DAC Akihiro Usuki, Masahiro Sasaki (SIT) ICD2016-64 CPSY2016-70 Link to ES Tech. Rep. Archives: ICD2016-64 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
In the current-steering DAC (Digital to Analog Converter), it is a serious problem that high frequency spike noise called glitch occurs on the output signal. In particular, when the transition directions of the digital input code are different from each other, a large amplitude glitch occurs due to the switching timing difference between the each current source cell. Therefore, in this research, we evaluate the method to reduce the glitch of the current-steering DAC by dividing the large current source cell into the smaller binary weighted ones and controlling the switching timings of these switches so that the amount of increasing or decreasing current that depends on transition direction becomes equal. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
current-steering DAC / glitch / current source / timing / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 116, no. 364, ICD2016-64, pp. 47-47, Dec. 2016. |
Paper # |
ICD2016-64 |
Date of Issue |
2016-12-08 (ICD, CPSY) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
Download PDF |
ICD2016-64 CPSY2016-70 Link to ES Tech. Rep. Archives: ICD2016-64 |
Conference Information |
Committee |
ICD CPSY |
Conference Date |
2016-12-15 - 2016-12-16 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Tokyo Institute of Technology |
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Paper Information |
Registration To |
ICD |
Conference Code |
2016-12-ICD-CPSY |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Analysis of Current Source Transition Timing and Output Current for Glitch Reduction of Current-Steering DAC |
Sub Title (in English) |
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current-steering DAC |
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glitch |
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current source |
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timing |
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1st Author's Name |
Akihiro Usuki |
1st Author's Affiliation |
Shibaura Institute of Technology (SIT) |
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Masahiro Sasaki |
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Shibaura Institute of Technology (SIT) |
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Speaker |
Author-1 |
Date Time |
2016-12-15 15:30:00 |
Presentation Time |
120 minutes |
Registration for |
ICD |
Paper # |
ICD2016-64, CPSY2016-70 |
Volume (vol) |
vol.116 |
Number (no) |
no.364(ICD), no.365(CPSY) |
Page |
p.47 |
#Pages |
1 |
Date of Issue |
2016-12-08 (ICD, CPSY) |
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