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Paper Abstract and Keywords
Presentation 2016-11-30 14:10
A study on verification method of stochastic flash A/D converter with FPGA
Shodai Isami, Toshimasa Matsuoka (Osaka Univ) CPM2016-88 ICD2016-49 IE2016-83 Link to ES Tech. Rep. Archives: CPM2016-88 ICD2016-49
Abstract (in Japanese) (See Japanese page) 
(in English) In a stochastic flash analog-to-digital converter utilizing a mismatch in device characteristics, system verification method in FPGA emulation is proposed by replacing comparators for comparing an analog input to ones for comparing the digital input.
Keyword (in Japanese) (See Japanese page) 
(in English) Stochastic flash analog-to-digital converter / analog-to-digital converter / FPGA / / / / /  
Reference Info. IEICE Tech. Rep., vol. 116, no. 334, ICD2016-49, pp. 63-67, Nov. 2016.
Paper # ICD2016-49 
Date of Issue 2016-11-22 (CPM, ICD, IE) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CPM2016-88 ICD2016-49 IE2016-83 Link to ES Tech. Rep. Archives: CPM2016-88 ICD2016-49

Conference Information
Conference Date 2016-11-28 - 2016-11-30 
Place (in Japanese) (See Japanese page) 
Place (in English) Ritsumeikan University, Osaka Ibaraki Campus 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Gaia 2016 -New Field of VLSI Design- 
Paper Information
Registration To ICD 
Conference Code 2016-11-VLD-DC-CPSY-RECONF-CPM-ICD-IE 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A study on verification method of stochastic flash A/D converter with FPGA 
Sub Title (in English)  
Keyword(1) Stochastic flash analog-to-digital converter  
Keyword(2) analog-to-digital converter  
Keyword(3) FPGA  
1st Author's Name Shodai Isami  
1st Author's Affiliation Osaka University (Osaka Univ)
2nd Author's Name Toshimasa Matsuoka  
2nd Author's Affiliation Osaka University (Osaka Univ)
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Date Time 2016-11-30 14:10:00 
Presentation Time 25 
Registration for ICD 
Paper # IEICE-CPM2016-88,IEICE-ICD2016-49,IEICE-IE2016-83 
Volume (vol) IEICE-116 
Number (no) no.333(CPM), no.334(ICD), no.335(IE) 
Page pp.63-67 
#Pages IEICE-5 
Date of Issue IEICE-CPM-2016-11-22,IEICE-ICD-2016-11-22,IEICE-IE-2016-11-22 

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