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Paper Abstract and Keywords
Presentation 2016-11-29 10:30
Accurate Lithography Simulation Model based on Deep Learning
Yuki Watanabe, Tetsuaki Matsunawa, Taiki Kimura, Shigeki Nojima (Toshiba) VLD2016-56 DC2016-50
Abstract (in Japanese) (See Japanese page) 
(in English) Lithography simulation is an indispensable technology for today's semiconductor manufacturing processes. To achieve accurate simulation, a model which predicts wafer patterns based on optical features of design patterns has been proposed. However, it is difficult to define appropriate features. This paper proposes a new model using CNN (Convolutional Neural Network) which is a powerful technique from the field of deep learning. The CNN model automatically determines design pattern features, and predicts wafer patterns accurately. Experimental results show proposed CNN model can reduce the prediction error to 30% compared with the conventional method.
Keyword (in Japanese) (See Japanese page) 
(in English) Lithography simulation / Resist Model / Deep learning / CNN / / / /  
Reference Info. IEICE Tech. Rep., vol. 116, no. 330, VLD2016-56, pp. 73-78, Nov. 2016.
Paper # VLD2016-56 
Date of Issue 2016-11-21 (VLD, DC) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2016-56 DC2016-50

Conference Information
Committee VLD DC CPSY RECONF CPM ICD IE  
Conference Date 2016-11-28 - 2016-11-30 
Place (in Japanese) (See Japanese page) 
Place (in English) Ritsumeikan University, Osaka Ibaraki Campus 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Gaia 2016 -New Field of VLSI Design- 
Paper Information
Registration To VLD 
Conference Code 2016-11-VLD-DC-CPSY-RECONF-CPM-ICD-IE 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Accurate Lithography Simulation Model based on Deep Learning 
Sub Title (in English)  
Keyword(1) Lithography simulation  
Keyword(2) Resist Model  
Keyword(3) Deep learning  
Keyword(4) CNN  
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1st Author's Name Yuki Watanabe  
1st Author's Affiliation Toshiba Corporation (Toshiba)
2nd Author's Name Tetsuaki Matsunawa  
2nd Author's Affiliation Toshiba Corporation (Toshiba)
3rd Author's Name Taiki Kimura  
3rd Author's Affiliation Toshiba Corporation (Toshiba)
4th Author's Name Shigeki Nojima  
4th Author's Affiliation Toshiba Corporation (Toshiba)
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Speaker
Date Time 2016-11-29 10:30:00 
Presentation Time 25 
Registration for VLD 
Paper # IEICE-VLD2016-56,IEICE-DC2016-50 
Volume (vol) IEICE-116 
Number (no) no.330(VLD), no.331(DC) 
Page pp.73-78 
#Pages IEICE-6 
Date of Issue IEICE-VLD-2016-11-21,IEICE-DC-2016-11-21 


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