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Paper Abstract and Keywords
Presentation 2016-11-28 12:45
2-step Charge Pump Voltage Booster Circuit for Micro Energy Harvesting
Tomoya Kimura, Hiroyuki ochi (Ritsumeikan Univ.) VLD2016-46 DC2016-40
Abstract (in Japanese) (See Japanese page) 
(in English) This report proposes L1L5-type 2-step charge pump circuit that is suitable for boosting efficiently the subthreshold input voltage obtained by on-chip solar cell to high voltage around 4V. Conventional cross-coupled charge pump needs 10 stages to obtain 4V output even if 40 pF capacitors are allowed, and its 800 pF capacitance in total occupies large amount of chip area, which poses difficulty in implementing it on the same chip with solar cells. The proposed circuit consists of the first-step charge pump that boosts the subthreshold-level input voltage to superthreshold-level and the second-step charge pump that generates even higher voltage using the clock of superthreshold-level voltage swing. Under the constraints of 100 pF total capacitance, we compared the power efficiency of our circuit with the conventional cross-coupled charge pump using circuit simulation with 0.18$mu$m CMOS technology model, and observed that the proposed circuit achieves 46.4% power efficiency at 4V output voltage, which is 5.2% higher than the conventional cross-coupled charge pump.
Keyword (in Japanese) (See Japanese page) 
(in English) Micro Energy Harvesting / Voltage Booster Circuit / Ultra Low Power / Subthreshold Circuit / / / /  
Reference Info. IEICE Tech. Rep., vol. 116, no. 330, VLD2016-46, pp. 13-18, Nov. 2016.
Paper # VLD2016-46 
Date of Issue 2016-11-21 (VLD, DC) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
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reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2016-46 DC2016-40

Conference Information
Committee VLD DC CPSY RECONF CPM ICD IE  
Conference Date 2016-11-28 - 2016-11-30 
Place (in Japanese) (See Japanese page) 
Place (in English) Ritsumeikan University, Osaka Ibaraki Campus 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Gaia 2016 -New Field of VLSI Design- 
Paper Information
Registration To VLD 
Conference Code 2016-11-VLD-DC-CPSY-RECONF-CPM-ICD-IE 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) 2-step Charge Pump Voltage Booster Circuit for Micro Energy Harvesting 
Sub Title (in English)  
Keyword(1) Micro Energy Harvesting  
Keyword(2) Voltage Booster Circuit  
Keyword(3) Ultra Low Power  
Keyword(4) Subthreshold Circuit  
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1st Author's Name Tomoya Kimura  
1st Author's Affiliation Ritsumeikan University (Ritsumeikan Univ.)
2nd Author's Name Hiroyuki ochi  
2nd Author's Affiliation Ritsumeikan University (Ritsumeikan Univ.)
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Speaker
Date Time 2016-11-28 12:45:00 
Presentation Time 25 
Registration for VLD 
Paper # IEICE-VLD2016-46,IEICE-DC2016-40 
Volume (vol) IEICE-116 
Number (no) no.330(VLD), no.331(DC) 
Page pp.13-18 
#Pages IEICE-6 
Date of Issue IEICE-VLD-2016-11-21,IEICE-DC-2016-11-21 


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