Paper Abstract and Keywords |
Presentation |
2016-08-03 15:30
Performance Enhancement of Tunnel FET by Negative Capacitance Masaharu Kobayashi, Kyungmin Jang, Nozomu Ueyama, Toshiro Hiramoto (Univ. of Tokyo) SDM2016-68 ICD2016-36 Link to ES Tech. Rep. Archives: SDM2016-68 ICD2016-36 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
IoT devices in a sensor network require a new energy-efficient transistor which operates at ultralow voltage and power employing energy-harvesting techniques. In this paper, we propose a new steep slope transistor by combining the feature of tunnel FET(TFET) and negative capacitance FET(NCFET) which have been independently studied so far. In NCTFET, band-to-band tunneling in TFET can be enhanced by negative capacitance effect of ferroelectric gate insulator. This results in improvement of subthreshold slope. The energy efficiency of NCTFET is about 10 times higher than conventional MOSFET and TFET. Therefore, NCTFET is expected to become a new CMOS platform for IoT application. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Tunnel FET / Negative Capacitance FET / steep slope transistor / ferroelectric / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 116, no. 172, SDM2016-68, pp. 127-130, Aug. 2016. |
Paper # |
SDM2016-68 |
Date of Issue |
2016-07-25 (SDM, ICD) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
Download PDF |
SDM2016-68 ICD2016-36 Link to ES Tech. Rep. Archives: SDM2016-68 ICD2016-36 |
Conference Information |
Committee |
ICD SDM ITE-IST |
Conference Date |
2016-08-01 - 2016-08-03 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Central Electric Club |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Analog, Mixed Analog and Digital, RF, and Sensor Interface, Low voltage/low power techniques, novel devices, circuits, and applications |
Paper Information |
Registration To |
SDM |
Conference Code |
2016-08-ICD-SDM-IST |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Performance Enhancement of Tunnel FET by Negative Capacitance |
Sub Title (in English) |
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Keyword(1) |
Tunnel FET |
Keyword(2) |
Negative Capacitance FET |
Keyword(3) |
steep slope transistor |
Keyword(4) |
ferroelectric |
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1st Author's Name |
Masaharu Kobayashi |
1st Author's Affiliation |
The University of Tokyo (Univ. of Tokyo) |
2nd Author's Name |
Kyungmin Jang |
2nd Author's Affiliation |
The University of Tokyo (Univ. of Tokyo) |
3rd Author's Name |
Nozomu Ueyama |
3rd Author's Affiliation |
The University of Tokyo (Univ. of Tokyo) |
4th Author's Name |
Toshiro Hiramoto |
4th Author's Affiliation |
The University of Tokyo (Univ. of Tokyo) |
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Speaker |
Author-1 |
Date Time |
2016-08-03 15:30:00 |
Presentation Time |
25 minutes |
Registration for |
SDM |
Paper # |
SDM2016-68, ICD2016-36 |
Volume (vol) |
vol.116 |
Number (no) |
no.172(SDM), no.173(ICD) |
Page |
pp.127-130 |
#Pages |
4 |
Date of Issue |
2016-07-25 (SDM, ICD) |
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