Paper Abstract and Keywords |
Presentation |
2016-06-16 11:40
A method of reducing amount of operations on the bit serial multiply-accumulator and its application Daichi Okamoto (Okayama Prefectural Univ.), Masafumi Kondo (Kawasaki Univ. of Medical Welfare), Yoshihiro Sejima, Tomoyuki Yokogawa, Kazutami Arimoto, Yoichiro Sato (Okayama Prefectural Univ.) CAS2016-7 VLD2016-13 SIP2016-41 MSS2016-7 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
Although the digital hearing aids with the high functionality of digital signal processor (DSP) becomes widely used, its battery life is limited to only a few days.
In order to solve this problem, we have proposed the low power bit serial multiply-accumulator (BS-MAC) by using a ring oscillator.
In BS-MAC which calculates sequentially per bit, however, it was difficult to satisfy the performance for necessary of a digital filter.
Therefore, we focus on unnecessary operations by zero multiplication, and improve the
calculation time and power consumption by curtailing these operations in BS-MAC.
In additon, we design FIR filter as an application of the BS-MAC, and confirm its operation through implementation on FPGA. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
digital hearing aid / bit serial / ring oscillator / low power consumption / FIR filter / / / |
Reference Info. |
IEICE Tech. Rep., vol. 116, no. 93, CAS2016-7, pp. 35-40, June 2016. |
Paper # |
CAS2016-7 |
Date of Issue |
2016-06-09 (CAS, VLD, SIP, MSS) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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CAS2016-7 VLD2016-13 SIP2016-41 MSS2016-7 |
Conference Information |
Committee |
VLD CAS MSS SIP |
Conference Date |
2016-06-16 - 2016-06-17 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Hirosaki Shiritsu Kanko-kan |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
System, signal processing and related topics |
Paper Information |
Registration To |
CAS |
Conference Code |
2016-06-VLD-CAS-MSS-SIP |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
A method of reducing amount of operations on the bit serial multiply-accumulator and its application |
Sub Title (in English) |
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Keyword(1) |
digital hearing aid |
Keyword(2) |
bit serial |
Keyword(3) |
ring oscillator |
Keyword(4) |
low power consumption |
Keyword(5) |
FIR filter |
Keyword(6) |
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Keyword(7) |
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1st Author's Name |
Daichi Okamoto |
1st Author's Affiliation |
Okayama Prefectural University (Okayama Prefectural Univ.) |
2nd Author's Name |
Masafumi Kondo |
2nd Author's Affiliation |
Kawasaki University of Medical Welfare (Kawasaki Univ. of Medical Welfare) |
3rd Author's Name |
Yoshihiro Sejima |
3rd Author's Affiliation |
Okayama Prefectural University (Okayama Prefectural Univ.) |
4th Author's Name |
Tomoyuki Yokogawa |
4th Author's Affiliation |
Okayama Prefectural University (Okayama Prefectural Univ.) |
5th Author's Name |
Kazutami Arimoto |
5th Author's Affiliation |
Okayama Prefectural University (Okayama Prefectural Univ.) |
6th Author's Name |
Yoichiro Sato |
6th Author's Affiliation |
Okayama Prefectural University (Okayama Prefectural Univ.) |
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Speaker |
Author-1 |
Date Time |
2016-06-16 11:40:00 |
Presentation Time |
20 minutes |
Registration for |
CAS |
Paper # |
CAS2016-7, VLD2016-13, SIP2016-41, MSS2016-7 |
Volume (vol) |
vol.116 |
Number (no) |
no.93(CAS), no.94(VLD), no.95(SIP), no.96(MSS) |
Page |
pp.35-40 |
#Pages |
6 |
Date of Issue |
2016-06-09 (CAS, VLD, SIP, MSS) |
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