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Paper Abstract and Keywords
Presentation 2016-05-20 11:15
Acceleration Algorithm Utilizing GPGPU of an FDTD Solver for Coaxial Feeding Patch Antennas
Nagayoshi Morita (MWS Lab.) EST2016-2 Link to ES Tech. Rep. Archives: EST2016-2
Abstract (in Japanese) (See Japanese page) 
(in English) FDTD (Finite Difference Time Domain) analysis of antennas often consumes enormous amount of time, particularly when high accuracy results are attempted. Therefore, once FDTD solvers are developed for analyzing antennas, it is extremely valuable to create further the GPGPU (General Purpose Computing on GPU) acceleration program codes corresponding to those solvers. It is well known that FDTD simulators for antenna analysis taking advantage of GPGPU techniques are already commercially available. Such a simulator, however, is of no use for a person who wants to create one’s own program. The author is currently investigating, by taking a coaxial feeding patch antenna as an example, various problems associated with GPGPU acceleration for the FDTD solvers. This report discusses the outline of the author’s own FDTD solvers and the corresponding acceleration algorithm utilizing GPU (Graphics Processing Unit) device.
Keyword (in Japanese) (See Japanese page) 
(in English) Patch Antenna / Coaxial Feeding / GPGPU / FDTD / Solver / Algorithm / /  
Reference Info. IEICE Tech. Rep., vol. 116, no. 56, EST2016-2, pp. 7-12, May 2016.
Paper # EST2016-2 
Date of Issue 2016-05-13 (EST) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF EST2016-2 Link to ES Tech. Rep. Archives: EST2016-2

Conference Information
Committee EST  
Conference Date 2016-05-20 - 2016-05-20 
Place (in Japanese) (See Japanese page) 
Place (in English) Kikai-Shinko-Kaikan Bldg. 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Simulation technology, etc. 
Paper Information
Registration To EST 
Conference Code 2016-05-EST 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Acceleration Algorithm Utilizing GPGPU of an FDTD Solver for Coaxial Feeding Patch Antennas 
Sub Title (in English)  
Keyword(1) Patch Antenna  
Keyword(2) Coaxial Feeding  
Keyword(3) GPGPU  
Keyword(4) FDTD  
Keyword(5) Solver  
Keyword(6) Algorithm  
1st Author's Name Nagayoshi Morita  
1st Author's Affiliation M Wave Solver Laboratory (MWS Lab.)
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Date Time 2016-05-20 11:15:00 
Presentation Time 25 
Registration for EST 
Paper # IEICE-EST2016-2 
Volume (vol) IEICE-116 
Number (no) no.56 
Page pp.7-12 
#Pages IEICE-6 
Date of Issue IEICE-EST-2016-05-13 

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