Paper Abstract and Keywords |
Presentation |
2016-05-20 15:25
OpenCL-Based FPGA Platform for FDTD Computation Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Yasuo Ohtera (Tohoku Univ.) EST2016-4 Link to ES Tech. Rep. Archives: EST2016-4 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
We propose a FPGA accelerator for FDTD (finite difference time domain) computation based on a pipelined architecture to solve the memory access bottleneck.Proposed architecture is designed using C language based OpenCL software. Compared to HDL (hardware description language) based design, hardware designed time has been reduced dramatically. According to the evaluation, we achieved over 100GFLOPS of processing speed. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
OpenCL for FPGA, / FDTD / stencil computation / accelerator / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 116, no. 56, EST2016-4, pp. 17-20, May 2016. |
Paper # |
EST2016-4 |
Date of Issue |
2016-05-13 (EST) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
Download PDF |
EST2016-4 Link to ES Tech. Rep. Archives: EST2016-4 |
Conference Information |
Committee |
EST |
Conference Date |
2016-05-20 - 2016-05-20 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Kikai-Shinko-Kaikan Bldg. |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Simulation technology, etc. |
Paper Information |
Registration To |
EST |
Conference Code |
2016-05-EST |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
OpenCL-Based FPGA Platform for FDTD Computation |
Sub Title (in English) |
|
Keyword(1) |
OpenCL for FPGA, |
Keyword(2) |
FDTD |
Keyword(3) |
stencil computation |
Keyword(4) |
accelerator |
Keyword(5) |
|
Keyword(6) |
|
Keyword(7) |
|
Keyword(8) |
|
1st Author's Name |
Hasitha Muthumala Waidyasooriya |
1st Author's Affiliation |
Tohoku University (Tohoku Univ.) |
2nd Author's Name |
Masanori Hariyama |
2nd Author's Affiliation |
Tohoku University (Tohoku Univ.) |
3rd Author's Name |
Yasuo Ohtera |
3rd Author's Affiliation |
Tohoku University (Tohoku Univ.) |
4th Author's Name |
|
4th Author's Affiliation |
() |
5th Author's Name |
|
5th Author's Affiliation |
() |
6th Author's Name |
|
6th Author's Affiliation |
() |
7th Author's Name |
|
7th Author's Affiliation |
() |
8th Author's Name |
|
8th Author's Affiliation |
() |
9th Author's Name |
|
9th Author's Affiliation |
() |
10th Author's Name |
|
10th Author's Affiliation |
() |
11th Author's Name |
|
11th Author's Affiliation |
() |
12th Author's Name |
|
12th Author's Affiliation |
() |
13th Author's Name |
|
13th Author's Affiliation |
() |
14th Author's Name |
|
14th Author's Affiliation |
() |
15th Author's Name |
|
15th Author's Affiliation |
() |
16th Author's Name |
|
16th Author's Affiliation |
() |
17th Author's Name |
|
17th Author's Affiliation |
() |
18th Author's Name |
|
18th Author's Affiliation |
() |
19th Author's Name |
|
19th Author's Affiliation |
() |
20th Author's Name |
|
20th Author's Affiliation |
() |
Speaker |
Author-1 |
Date Time |
2016-05-20 15:25:00 |
Presentation Time |
25 minutes |
Registration for |
EST |
Paper # |
EST2016-4 |
Volume (vol) |
vol.116 |
Number (no) |
no.56 |
Page |
pp.17-20 |
#Pages |
4 |
Date of Issue |
2016-05-13 (EST) |
|