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Paper Abstract and Keywords
Presentation 2016-03-28 13:15
[Poster Presentation] Verification of Circuit Scale and Design Error for CSD Coefficient FIR Filters
Tomohiro Sasahara, Kenji Suyama (Tokyo Denki Univ.) EA2015-87 SIP2015-136 SP2015-115
Abstract (in Japanese) (See Japanese page) 
(in English) In this paper, a CSD (Canonic Signed Digit) coefficient FIR (Finite Impulse Response) filter design is studied. In the design problem, several factors relating a circuit scale such as a filter order, a word length and the maximum number of available nonzero digits in total are specified in dvance. When the maximum number of available nonzero digits is set to a small value, the design error tends to be large. Therefore, we verify the relationship between the circuit scale and the design error using ACO which is well-known as an effective method for this design problem. Verification results show the better maximum number of available nonzero digits which can reduce the design error.
Keyword (in Japanese) (See Japanese page) 
(in English) FIR filter / ACO / / / / / /  
Reference Info. IEICE Tech. Rep., vol. 115, no. 522, SIP2015-136, pp. 123-127, March 2016.
Paper # SIP2015-136 
Date of Issue 2016-03-21 (EA, SIP, SP) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (No. 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF EA2015-87 SIP2015-136 SP2015-115

Conference Information
Committee EA SP SIP  
Conference Date 2016-03-28 - 2016-03-29 
Place (in Japanese) (See Japanese page) 
Place (in English) Beppu International Convention Center B-ConPlaza 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Engineering/Electro Acoustics, Speech, Signal Processing, and Related Topics 
Paper Information
Registration To SIP 
Conference Code 2016-03-EA-SP-SIP 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Verification of Circuit Scale and Design Error for CSD Coefficient FIR Filters 
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Keyword(1) FIR filter  
Keyword(2) ACO  
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1st Author's Name Tomohiro Sasahara  
1st Author's Affiliation Tokyo Denki University (Tokyo Denki Univ.)
2nd Author's Name Kenji Suyama  
2nd Author's Affiliation Tokyo Denki University (Tokyo Denki Univ.)
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Speaker
Date Time 2016-03-28 13:15:00 
Presentation Time 90 
Registration for SIP 
Paper # IEICE-EA2015-87,IEICE-SIP2015-136,IEICE-SP2015-115 
Volume (vol) IEICE-115 
Number (no) no.521(EA), no.522(SIP), no.523(SP) 
Page pp.123-127 
#Pages IEICE-5 
Date of Issue IEICE-EA-2016-03-21,IEICE-SIP-2016-03-21,IEICE-SP-2016-03-21 


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