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Paper Abstract and Keywords
Presentation 2016-03-22 11:00
An STDP control circuit and its evaluation using a Cu-MoOx-Al resistance change memory fabricated on a Si MOSFET
Kazumasa Tomizaki, Takashi Morie, Hideyuki Ando (Kyushu Inst. Tech.), Atsushi Fukuchi, Masashi Arita, Yasuo Takahashi (Hokkaido Univ.) NC2015-70
Abstract (in Japanese) (See Japanese page) 
(in English) With the progress of practical implementation of deep learning in neural networks, high-speed and low-power neural hardware (very-large-scale integrated circuits) that performs learning operation is being developed. The circuit architecture of such hardware is classified into digital and analog. Several digital neural integrated circuits have already been developed, and analog neural integrated circuits, which are expected to achieve higher performance, are also being developed. The most crucial issue for analog neural circuits is development of analog memory devices. Recently, as promising such devices, resistance change memory devices are actively studied, and some analog neural circuits with learning mechanisms using such devices have been reported. Spike-timing dependent plasticity (STDP) is often tried to implement as a learning rule. In this paper, we report evaluation results of analog memory characteristics of resistance change memory devices including Molybdenum oxide, design of memory control circuits implementing STDP, and experimental results of memory operation with asymmetric STDP characteristics.
Keyword (in Japanese) (See Japanese page) 
(in English) resistance change memory / neural network hardware / STDP control circuit / SET/RESET operation / / / /  
Reference Info. IEICE Tech. Rep., vol. 115, no. 514, NC2015-70, pp. 7-12, March 2016.
Paper # NC2015-70 
Date of Issue 2016-03-15 (NC) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee MBE NC  
Conference Date 2016-03-22 - 2016-03-23 
Place (in Japanese) (See Japanese page) 
Place (in English) Tamagawa University 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To NC 
Conference Code 2016-03-MBE-NC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) An STDP control circuit and its evaluation using a Cu-MoOx-Al resistance change memory fabricated on a Si MOSFET 
Sub Title (in English)  
Keyword(1) resistance change memory  
Keyword(2) neural network hardware  
Keyword(3) STDP control circuit  
Keyword(4) SET/RESET operation  
1st Author's Name Kazumasa Tomizaki  
1st Author's Affiliation Kyushu Institute of Technology (Kyushu Inst. Tech.)
2nd Author's Name Takashi Morie  
2nd Author's Affiliation Kyushu Institute of Technology (Kyushu Inst. Tech.)
3rd Author's Name Hideyuki Ando  
3rd Author's Affiliation Kyushu Institute of Technology (Kyushu Inst. Tech.)
4th Author's Name Atsushi Fukuchi  
4th Author's Affiliation Hokkaido University (Hokkaido Univ.)
5th Author's Name Masashi Arita  
5th Author's Affiliation Hokkaido University (Hokkaido Univ.)
6th Author's Name Yasuo Takahashi  
6th Author's Affiliation Hokkaido University (Hokkaido Univ.)
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Date Time 2016-03-22 11:00:00 
Presentation Time 25 
Registration for NC 
Paper # IEICE-NC2015-70 
Volume (vol) IEICE-115 
Number (no) no.514 
Page pp.7-12 
#Pages IEICE-6 
Date of Issue IEICE-NC-2016-03-15 

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