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Paper Abstract and Keywords
Presentation 2016-03-11 09:50
A Performance Evaluation of Packet Processing Architectures for NFV Environment
Shin Muramatsu, Ryota Kawashima (NIT), Hiroki Nakayama, Tsunemasa Hayashi (BOSCO), Hiroshi Matsuo (NIT) ICM2015-47
Abstract (in Japanese) (See Japanese page) 
(in English) The notion of Network Functions Virtualization (NFV) has been introduced into commercial networks for fast and flexible service deployment.
Service chaining is a key technology to realize the NFV concept, however, current NFV implementation suffers performance problems because network functions are provided as software components on commodity IA servers.
So far, various high-performance packet processing architectures such as Intel DPDK have been proposed, but there is no comprehensive study that evaluated the performance effect of these architectures and combinations of them.
In this paper, we evaluate performance of various packet processing architectures (NAPI, netmap, and Intel DPDK) , virtual switches (Open vSwitch, VALE, and Lagopus) and virtual NIC back-ends (vhost-net and vhost-user), and discuss appropriate architectures for commercial NFV environment.
Keyword (in Japanese) (See Japanese page) 
(in English) NFV / Open vSwitch / Lagopus / VALE / netmap / Intel DPDK / /  
Reference Info. IEICE Tech. Rep., vol. 115, no. 507, ICM2015-47, pp. 31-36, March 2016.
Paper # ICM2015-47 
Date of Issue 2016-03-03 (ICM) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
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reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee ICM  
Conference Date 2016-03-10 - 2016-03-11 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English) Element Management, Management Functionalities, Operations and Management Technologies 
Paper Information
Registration To ICM 
Conference Code 2016-03-ICM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A Performance Evaluation of Packet Processing Architectures for NFV Environment 
Sub Title (in English)  
Keyword(1) NFV  
Keyword(2) Open vSwitch  
Keyword(3) Lagopus  
Keyword(4) VALE  
Keyword(5) netmap  
Keyword(6) Intel DPDK  
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Keyword(8)  
1st Author's Name Shin Muramatsu  
1st Author's Affiliation Nagoya Institute of Technology (NIT)
2nd Author's Name Ryota Kawashima  
2nd Author's Affiliation Nagoya Institute of Technology (NIT)
3rd Author's Name Hiroki Nakayama  
3rd Author's Affiliation BOSCO Technologies, Inc. (BOSCO)
4th Author's Name Tsunemasa Hayashi  
4th Author's Affiliation BOSCO Technologies, Inc. (BOSCO)
5th Author's Name Hiroshi Matsuo  
5th Author's Affiliation Nagoya Institute of Technology (NIT)
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Speaker Author-1 
Date Time 2016-03-11 09:50:00 
Presentation Time 20 minutes 
Registration for ICM 
Paper # ICM2015-47 
Volume (vol) vol.115 
Number (no) no.507 
Page pp.31-36 
#Pages
Date of Issue 2016-03-03 (ICM) 


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