Paper Abstract and Keywords |
Presentation |
2016-01-29 09:00
An Integrated Power Supply System with the Parallel Connected POL Kiminori Tanaka, Yoichi Ishizuka (Nagasaki Univ.), Tamotsu Ninomiya (Green Electronics Research Institute Kitakyushu) EE2015-15 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
In this study, multiple connected point of load (POL) for full integrated voltage regulator (FIVR)is proposed. The proposed circuit is designed as dynamically transformed architecture. The architecture is effective to realize fast response for load change and also high power efficiency drive in wide load current range. In this paper, the architecture is verified with some simulation results. The results reveal the effectiveness of the proposed dynamic POL architecture. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Point-Of-Load / Power Integrated Circuit / / / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 115, no. 429, EE2015-15, pp. 37-42, Jan. 2016. |
Paper # |
EE2015-15 |
Date of Issue |
2016-01-21 (EE) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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EE2015-15 |
Conference Information |
Committee |
EE |
Conference Date |
2016-01-28 - 2016-01-29 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
KURUME HOTEL ESPRIT |
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Paper Information |
Registration To |
EE |
Conference Code |
2016-01-EE |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
An Integrated Power Supply System with the Parallel Connected POL |
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Point-Of-Load |
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Power Integrated Circuit |
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1st Author's Name |
Kiminori Tanaka |
1st Author's Affiliation |
Nagasaki University (Nagasaki Univ.) |
2nd Author's Name |
Yoichi Ishizuka |
2nd Author's Affiliation |
Nagasaki University (Nagasaki Univ.) |
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Tamotsu Ninomiya |
3rd Author's Affiliation |
Green Electronics Research Institute Kitakyushu (Green Electronics Research Institute Kitakyushu) |
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Speaker |
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Date Time |
2016-01-29 09:00:00 |
Presentation Time |
20 minutes |
Registration for |
EE |
Paper # |
EE2015-15 |
Volume (vol) |
vol.115 |
Number (no) |
no.429 |
Page |
pp.37-42 |
#Pages |
6 |
Date of Issue |
2016-01-21 (EE) |