Paper Abstract and Keywords |
Presentation |
2016-01-21 10:55
Power Reduction of TLB using Body Bias Control on SOTB Daiki Kawase, Hayate Okuhara, Hideharu Amano (Keio Univ.) VLD2015-102 CPSY2015-134 RECONF2015-84 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
SOTB(Silicon on thin buried oxide) MOSFET is one of the FD-SOI device with 10nm BOX layer. SOTB
effectively reduces the leakage current and can widely adjust trade-off between power consumption and performance
by controling body-bias. On the other hand, TLB(Translation Lookaside Buffer), which is a memory management
unit for the processors, is tend to become a hot-spot on the chip and occupies large percentages of the total leakage
power on the chip. We applied SOTB 65nm technology to TLB and reduced leakage power by body-bias control.
Evaluation results with simulation show that SOTB using body-bias can reduce the leakage power of TLB by 90%
at maximum. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
SOTB / TLB / body-bias control / power reduction / leakage power / / / |
Reference Info. |
IEICE Tech. Rep., vol. 115, no. 399, CPSY2015-134, pp. 191-196, Jan. 2016. |
Paper # |
CPSY2015-134 |
Date of Issue |
2016-01-12 (VLD, CPSY, RECONF) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
Download PDF |
VLD2015-102 CPSY2015-134 RECONF2015-84 |
Conference Information |
Committee |
VLD CPSY RECONF IPSJ-SLDM IPSJ-ARC |
Conference Date |
2016-01-19 - 2016-01-21 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Hiyoshi Campus, Keio University |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
FPGA Applications, etc |
Paper Information |
Registration To |
CPSY |
Conference Code |
2016-01-VLD-CPSY-RECONF-SLDM-ARC |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Power Reduction of TLB using Body Bias Control on SOTB |
Sub Title (in English) |
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Keyword(1) |
SOTB |
Keyword(2) |
TLB |
Keyword(3) |
body-bias control |
Keyword(4) |
power reduction |
Keyword(5) |
leakage power |
Keyword(6) |
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1st Author's Name |
Daiki Kawase |
1st Author's Affiliation |
Keio University (Keio Univ.) |
2nd Author's Name |
Hayate Okuhara |
2nd Author's Affiliation |
Keio University (Keio Univ.) |
3rd Author's Name |
Hideharu Amano |
3rd Author's Affiliation |
Keio University (Keio Univ.) |
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Speaker |
Author-1 |
Date Time |
2016-01-21 10:55:00 |
Presentation Time |
25 minutes |
Registration for |
CPSY |
Paper # |
VLD2015-102, CPSY2015-134, RECONF2015-84 |
Volume (vol) |
vol.115 |
Number (no) |
no.398(VLD), no.399(CPSY), no.400(RECONF) |
Page |
pp.191-196 |
#Pages |
6 |
Date of Issue |
2016-01-12 (VLD, CPSY, RECONF) |
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