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Paper Abstract and Keywords
Presentation 2016-01-21 09:25
Discussion on FPGA implementation of real-time human detection using FIND features
Yoshiki Hayashida, Masahito Oishi, Ryo Fujita, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) VLD2015-99 CPSY2015-131 RECONF2015-81
Abstract (in Japanese) (See Japanese page) 
(in English) In this paper, we discuss FPGA implementation of image-based human
detection using the feature interaction descriptor (FIND) features.
The FIND feature is an improved version of the HOG feature and can
achieve a higher detection rate. However, due to its high arithmetic
cost, parallel architectures are indispensable to enable real-time
processing. Especially, calculation of co-occurrence features
requires large amount of resources, making FPGA implementation
difficult. Thus, we focus on this calculation and compare two major
implementation approaches: arithmetic modules generated by CORE
Generator and the Goldschmidt method. Although the CORE Generator
method requires the smallest hardware among the evaluated
alternatives, its size is still too large to implement whole circuits.
Therefore, we explore a proper approach with linear programming for
well-balanced resource utilization. As a result, it is shown that a
good combination of various implementation alternatives enables
implementation
of more
arithmetic modules compared to when a single type of arithmetic
modules is utilized.
Keyword (in Japanese) (See Japanese page) 
(in English) FPGA / FIND feature / human detection / / / / /  
Reference Info. IEICE Tech. Rep., vol. 115, no. 400, RECONF2015-81, pp. 173-178, Jan. 2016.
Paper # RECONF2015-81 
Date of Issue 2016-01-12 (VLD, CPSY, RECONF) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2015-99 CPSY2015-131 RECONF2015-81

Conference Information
Committee VLD CPSY RECONF IPSJ-SLDM IPSJ-ARC  
Conference Date 2016-01-19 - 2016-01-21 
Place (in Japanese) (See Japanese page) 
Place (in English) Hiyoshi Campus, Keio University 
Topics (in Japanese) (See Japanese page) 
Topics (in English) FPGA Applications, etc 
Paper Information
Registration To RECONF 
Conference Code 2016-01-VLD-CPSY-RECONF-SLDM-ARC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Discussion on FPGA implementation of real-time human detection using FIND features 
Sub Title (in English)  
Keyword(1) FPGA  
Keyword(2) FIND feature  
Keyword(3) human detection  
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1st Author's Name Yoshiki Hayashida  
1st Author's Affiliation Nagasaki University (Nagasaki Univ.)
2nd Author's Name Masahito Oishi  
2nd Author's Affiliation Nagasaki University (Nagasaki Univ.)
3rd Author's Name Ryo Fujita  
3rd Author's Affiliation Nagasaki University (Nagasaki Univ.)
4th Author's Name Yuichiro Shibata  
4th Author's Affiliation Nagasaki University (Nagasaki Univ.)
5th Author's Name Kiyoshi Oguri  
5th Author's Affiliation Nagasaki University (Nagasaki Univ.)
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Speaker Author-1 
Date Time 2016-01-21 09:25:00 
Presentation Time 25 minutes 
Registration for RECONF 
Paper # VLD2015-99, CPSY2015-131, RECONF2015-81 
Volume (vol) vol.115 
Number (no) no.398(VLD), no.399(CPSY), no.400(RECONF) 
Page pp.173-178 
#Pages
Date of Issue 2016-01-12 (VLD, CPSY, RECONF) 


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