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| Presentation | 2015-12-02 11:40 Performance Comparison of FPGA Accelerators with Vivado HLS and PyCoRAM Yuma Kikutani (OPUCT), Thi Hong Tran, Shinya Takamaeda, Yasuhiko Nakashima (NAIST)  CPSY2015-66 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | High-level synthesis (HLS) technology has been an attractive and efficient method for FPGA system development. In this paper, we developed matrix multiplication accelerators by using two different HLS tools: PyCoRAM, an open sourced HLS tool in Python, and Vivado HLS, a commercial HLS tool. Then we evaluated the performance by using an ARM-based FPGA platform. The evaluation result shows that the accelerator using PyCoRAM is faster than the one using Vivado HLS. It indicates that an explicit tuning way and the predictability of the performance are important for high performance system development with HLS tools. In addition, FPGA accelerators we developed could not overcome the CPU on the same board, due to its narrower memory bandwidth to the external DRAM than the CPU. It shows that a wider interconnection to the external memory is required to achieve higher performance than the CPU. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | FPGA / High Level Synthesis / Vivado HLS / PyCoRAM / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 115, no. 342, CPSY2015-66, pp. 27-32, Dec. 2015. | |
| Paper # | CPSY2015-66 | |
| Date of Issue | 2015-11-24 (CPSY) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | CPSY2015-66 |
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| Conference Information | |
| Committee | VLD DC IPSJ-SLDM CPSY RECONF ICD CPM |
| Conference Date | 2015-12-01 - 2015-12-03 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Nagasaki Kinro Fukushi Kaikan |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Gaia 2015 -New Field of VLSI Design- |
| Paper Information | |
| Registration To | CPSY |
| Conference Code | 2015-12-VLD-DC-SLDM-CPSY-RECONF-ICD-CPM |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Performance Comparison of FPGA Accelerators with Vivado HLS and PyCoRAM |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | High Level Synthesis |
| Keyword(3) | Vivado HLS |
| Keyword(4) | PyCoRAM |
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| 1st Author's Name | Yuma Kikutani |
| 1st Author's Affiliation | Osaka Prefecture University College of Technology (OPUCT) |
| 2nd Author's Name | Thi Hong Tran |
| 2nd Author's Affiliation | Nara Institute of Science and Technology (NAIST) |
| 3rd Author's Name | Shinya Takamaeda |
| 3rd Author's Affiliation | Nara Institute of Science and Technology (NAIST) |
| 4th Author's Name | Yasuhiko Nakashima |
| 4th Author's Affiliation | Nara Institute of Science and Technology (NAIST) |
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| Speaker | Author-1 |
| Date Time | 2015-12-02 11:40:00 |
| Presentation Time | 25 minutes |
| Registration for | CPSY |
| Paper # | CPSY2015-66 |
| Volume (vol) | vol.115 |
| Number (no) | no.342 |
| Page | pp.27-32 |
| #Pages | 6 |
| Date of Issue | 2015-11-24 (CPSY) |
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