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Paper Abstract and Keywords
Presentation 2015-11-21 11:15
A bit serial multiply and accumulator with negative number operation
Daichi Okamoto (Okayama Prefectural Univ.), Masafumi Kondo (Kawasaki Univ. of Medical Welfare), Yoshihiro Sejima, Yoichiro Sato, Tomoyuki Yokogawa, Kazutami Arimoto (Okayama Prefectural Univ.) CAS2015-58 MSS2015-32
Abstract (in Japanese) (See Japanese page) 
(in English) Recently, digital hearing aids with the high functionality of digital signal processor (DSP) become widely used, and thus its battery life is limited to only few days by a heavy load on its DSP. In order to solve this problem, we have provided a low area and power saving bit serial multiplier by using a ring oscillator. However, since the multiplier does not support the negative number operation, it cannot be applied to the multiply and accumulator used by digital filter. Therefore, we propose a multiplier capable of complement by the two's complement representation. We designed the bit serial multiply and accumulator and exhibited the simulation results that showed the intended behavior. We also showed the effectiveness of the proposed multiply and accumulator through power consumption analysis on FPGA.
Keyword (in Japanese) (See Japanese page) 
(in English) digital hearing aid / bit serial / two's complement / DSP / ring oscillator / / /  
Reference Info. IEICE Tech. Rep., vol. 115, no. 315, CAS2015-58, pp. 115-120, Nov. 2015.
Paper # CAS2015-58 
Date of Issue 2015-11-13 (CAS, MSS) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CAS2015-58 MSS2015-32

Conference Information
Committee MSS CAS IPSJ-AL  
Conference Date 2015-11-20 - 2015-11-21 
Place (in Japanese) (See Japanese page) 
Place (in English) Ibusuki CityHall 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To CAS 
Conference Code 2015-11-MSS-CAS-AL 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A bit serial multiply and accumulator with negative number operation 
Sub Title (in English)  
Keyword(1) digital hearing aid  
Keyword(2) bit serial  
Keyword(3) two's complement  
Keyword(4) DSP  
Keyword(5) ring oscillator  
1st Author's Name Daichi Okamoto  
1st Author's Affiliation Okayama Prefectural University (Okayama Prefectural Univ.)
2nd Author's Name Masafumi Kondo  
2nd Author's Affiliation Kawasaki University of Medical Welfare (Kawasaki Univ. of Medical Welfare)
3rd Author's Name Yoshihiro Sejima  
3rd Author's Affiliation Okayama Prefectural University (Okayama Prefectural Univ.)
4th Author's Name Yoichiro Sato  
4th Author's Affiliation Okayama Prefectural University (Okayama Prefectural Univ.)
5th Author's Name Tomoyuki Yokogawa  
5th Author's Affiliation Okayama Prefectural University (Okayama Prefectural Univ.)
6th Author's Name Kazutami Arimoto  
6th Author's Affiliation Okayama Prefectural University (Okayama Prefectural Univ.)
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Date Time 2015-11-21 11:15:00 
Presentation Time 25 
Registration for CAS 
Paper # IEICE-CAS2015-58,IEICE-MSS2015-32 
Volume (vol) IEICE-115 
Number (no) no.315(CAS), no.316(MSS) 
Page pp.115-120 
#Pages IEICE-6 
Date of Issue IEICE-CAS-2015-11-13,IEICE-MSS-2015-11-13 

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